llvm-6502/test/CodeGen/X86/frameaddr.ll
Jan Wen Voung a44126f432 Use 32-bit ebp for NaCl64 in a limited case: llvm.frameaddress.
Summary:
Follow up to [x32] "Use ebp/esp as frame and stack pointer":
http://reviews.llvm.org/D4617

In that earlier patch, NaCl64 was made to always use rbp.
That's needed for most cases because rbp should hold a full
64-bit address within the NaCl sandbox so that load/stores
off of rbp don't require sandbox adjustment (zeroing the top
32-bits, then filling those by adding r15).

However, llvm.frameaddress returns a pointer and pointers
are 32-bit for NaCl64. In this case, use ebp instead, which
will make the register copy type check. A similar mechanism
may be needed for llvm.eh.return, but is not added in this change.

Test Plan: test/CodeGen/X86/frameaddr.ll

Reviewers: dschuff, nadav

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D6514

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223510 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-05 20:55:53 +00:00

71 lines
2.5 KiB
LLVM

; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
; RUN: llc < %s -march=x86 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-32
; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
; RUN: llc < %s -march=x86-64 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-64
; RUN: llc < %s -mtriple=x86_64-gnux32 | FileCheck %s --check-prefix=CHECK-X32ABI
; RUN: llc < %s -mtriple=x86_64-gnux32 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-X32ABI
; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s --check-prefix=CHECK-NACL64
; RUN: llc < %s -mtriple=x86_64-nacl -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-NACL64
define i8* @test1() nounwind {
entry:
; CHECK-32-LABEL: test1
; CHECK-32: push
; CHECK-32-NEXT: movl %esp, %ebp
; CHECK-32-NEXT: movl %ebp, %eax
; CHECK-32-NEXT: pop
; CHECK-32-NEXT: ret
; CHECK-64-LABEL: test1
; CHECK-64: push
; CHECK-64-NEXT: movq %rsp, %rbp
; CHECK-64-NEXT: movq %rbp, %rax
; CHECK-64-NEXT: pop
; CHECK-64-NEXT: ret
; CHECK-X32ABI-LABEL: test1
; CHECK-X32ABI: pushq %rbp
; CHECK-X32ABI-NEXT: movl %esp, %ebp
; CHECK-X32ABI-NEXT: movl %ebp, %eax
; CHECK-X32ABI-NEXT: popq %rbp
; CHECK-X32ABI-NEXT: ret
; CHECK-NACL64-LABEL: test1
; CHECK-NACL64: pushq %rbp
; CHECK-NACL64-NEXT: movq %rsp, %rbp
; CHECK-NACL64-NEXT: movl %ebp, %eax
%0 = tail call i8* @llvm.frameaddress(i32 0)
ret i8* %0
}
define i8* @test2() nounwind {
entry:
; CHECK-32-LABEL: test2
; CHECK-32: push
; CHECK-32-NEXT: movl %esp, %ebp
; CHECK-32-NEXT: movl (%ebp), %eax
; CHECK-32-NEXT: movl (%eax), %eax
; CHECK-32-NEXT: pop
; CHECK-32-NEXT: ret
; CHECK-64-LABEL: test2
; CHECK-64: push
; CHECK-64-NEXT: movq %rsp, %rbp
; CHECK-64-NEXT: movq (%rbp), %rax
; CHECK-64-NEXT: movq (%rax), %rax
; CHECK-64-NEXT: pop
; CHECK-64-NEXT: ret
; CHECK-X32ABI-LABEL: test2
; CHECK-X32ABI: pushq %rbp
; CHECK-X32ABI-NEXT: movl %esp, %ebp
; CHECK-X32ABI-NEXT: movl (%ebp), %eax
; CHECK-X32ABI-NEXT: movl (%eax), %eax
; CHECK-X32ABI-NEXT: popq %rbp
; CHECK-X32ABI-NEXT: ret
; CHECK-NACL64-LABEL: test2
; CHECK-NACL64: pushq %rbp
; CHECK-NACL64-NEXT: movq %rsp, %rbp
; CHECK-NACL64-NEXT: movl (%ebp), %eax
; CHECK-NACL64-NEXT: movl (%eax), %eax
%0 = tail call i8* @llvm.frameaddress(i32 2)
ret i8* %0
}
declare i8* @llvm.frameaddress(i32) nounwind readnone