Matt Arsenault 324a7cd8be R600/SI: Fix register class for some 64-bit atomics ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217323 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-07 00:46:20 +00:00
..
Analysis
AsmParser
Bitcode	Pass a && to getLazyBitcodeModule.	2014-09-03 17:31:46 +00:00
CodeGen	Allow vector fsub ops with constants to get the same optimizations as scalars.	2014-09-05 22:26:22 +00:00
DebugInfo	[DWARF parser] Fix nasty memory corruption in .dwo files handling.	2014-09-05 19:29:45 +00:00
ExecutionEngine	[MCJIT] Fix an iterator invalidation bug in MCJIT::finalizeObject.	2014-09-05 23:38:35 +00:00
IR	[x86] Fix a pretty horrible bug and inconsistency in the x86 asm	2014-09-06 10:00:01 +00:00
IRReader	Pass a && to getLazyBitcodeModule.	2014-09-03 17:31:46 +00:00
LineEditor
Linker	Fix pr20078.	2014-09-05 21:27:52 +00:00
LTO
MC	MC: correct DWARF line info for PE/COFF	2014-09-06 19:57:48 +00:00
Object	Restore the ability to check if LLVMCreateObjectFile was successful	2014-09-05 21:22:09 +00:00
Option
ProfileData	Make some helpers static or move into the llvm namespace.	2014-09-03 21:04:12 +00:00
Support	Check whether the iterator p == the end iterator before trying to dereference it. This is a speculative fix for a failure found on the valgrind buildbot triggered by a clang test.	2014-09-06 01:16:42 +00:00
TableGen
Target	R600/SI: Fix register class for some 64-bit atomics	2014-09-07 00:46:20 +00:00
Transforms	InstCombine: Remove a special case pattern	2014-09-05 06:09:24 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile