llvm-6502/test/CodeGen
Vasileios Kalintiris 328bc2f89e [mips] Add preliminary support for the MIPS II target.
Summary:
This patch enables code generation for the MIPS II target. Pre-Mips32
targets don't have the MUL instruction, so we add the correspondent
pattern that uses the MULT/MFLO combination in order to retrieve the
product.

This is WIP as we don't support code generation for select nodes due to
the lack of conditional-move instructions.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221686 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 11:43:55 +00:00
..
AArch64 [AArch64][FastISel] Fix kill flags for integer extends. 2014-11-10 21:05:31 +00:00
ARM [RegAlloc] Remove reference to the trivial spiller in test case. 2014-11-06 19:24:18 +00:00
CPP
Generic
Hexagon Handle ctor/init_array initialization. 2014-11-03 14:56:05 +00:00
Inputs
Mips [mips] Add preliminary support for the MIPS II target. 2014-11-11 11:43:55 +00:00
MSP430
NVPTX [NVPTX] Add NVPTXLowerStructArgs pass 2014-11-05 18:19:30 +00:00
PowerPC [PowerPC] Initial VSX intrinsic support, with min/max for vector double 2014-10-31 19:19:07 +00:00
R600 R600/SI: Fix broken check prefixes in test 2014-11-08 00:02:57 +00:00
SPARC
SystemZ
Thumb Improve logic that decides if its profitable to commute when some of the virtual registers involved have uses/defs chains connecting them to physical register. Fix up the tests that this change improves. 2014-11-05 06:43:02 +00:00
Thumb2 ARM: Fix a bug which was causing convergence failure in constant-island pass. 2014-10-17 01:31:47 +00:00
X86 [X86] Add missing check for 'isINSERTPSMask' in method 'isShuffleMaskLegal'. 2014-11-11 11:20:31 +00:00
XCore Fix a bit of confusion about .set and produce more readable assembly. 2014-10-21 01:17:30 +00:00