Chad Rosier 32dc2de667 [FastISel][AArch64] Also allow folding of sign-/zero-extend and arithmetic ... shift-right for booleans (i1). Arithmetic shift-right immediate with sign-/zero-extensions also works for boolean values. Update the assert and the test cases to reflect that fact. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222272 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-18 22:41:49 +00:00
..
AArch64	[FastISel][AArch64] Also allow folding of sign-/zero-extend and arithmetic	2014-11-18 22:41:49 +00:00
ARM	Fix ARM triple parsing	2014-11-17 14:08:57 +00:00
CPP
Generic
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs
Mips	First stage of call lowering for Mips fast-isel	2014-11-13 23:37:45 +00:00
MSP430
NVPTX	[NVPTX] Add NVPTXLowerStructArgs pass	2014-11-05 18:19:30 +00:00
PowerPC	[PowerPC] Add VSX builtins for vec_div	2014-11-14 12:10:40 +00:00
R600	R600/SI: Move SIFixSGPRCopies to inst selector passes	2014-11-18 21:06:58 +00:00
SPARC
SystemZ
Thumb	[Thumb1] Re-write emitThumbRegPlusImmediate	2014-11-17 11:18:10 +00:00
Thumb2	ARM: allow constpool entry to be moved to the user's block in all cases.	2014-11-13 17:58:53 +00:00
X86	[X86] Use ADD/SUB instead of INC/DEC for Haswell and Broadwell CPUs	2014-11-17 16:17:51 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00