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https://github.com/c64scene-ar/llvm-6502.git
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ebdeeab812
- Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
1.2 KiB
C++
38 lines
1.2 KiB
C++
//===- AlphaSubtarget.cpp - Alpha Subtarget Information ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Alpha specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "AlphaSubtarget.h"
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#include "Alpha.h"
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#define GET_SUBTARGETINFO_ENUM
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#define GET_SUBTARGETINFO_MC_DESC
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "AlphaGenSubtargetInfo.inc"
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using namespace llvm;
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AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS)
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: AlphaGenSubtargetInfo(TT, CPU, FS), HasCT(false) {
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std::string CPUName = CPU;
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if (CPUName.empty())
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CPUName = "generic";
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// Parse features string.
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ParseSubtargetFeatures(CPUName, FS);
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// Initialize scheduling itinerary for the specified CPU.
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InstrItins = getInstrItineraryForCPU(CPUName);
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}
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