Chad Rosier 33947b4391 [fast-isel] Add support for the expect intrinsic. ... rdar://13370942 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176649 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-07 20:42:17 +00:00
..
AArch64	AArch64: be more careful resorting to inefficient addressing for weak vars.	2013-02-28 14:36:31 +00:00
ARM	[fast-isel] Add support for the expect intrinsic.	2013-03-07 20:42:17 +00:00
CPP
Generic
Hexagon	Hexagon: Handle i8, i16 and i1 Var Args.	2013-03-07 20:28:34 +00:00
MBlaze
Mips	[mips] Custom-legalize BR_JT.	2013-03-06 21:32:03 +00:00
MSP430
NVPTX	[NVPTX] Disable vector registers	2013-02-12 14:18:49 +00:00
PowerPC	Fix PR15332 (patch by Florian Zeitz).	2013-02-26 21:28:57 +00:00
R600	R600: Turn BUILD_VECTOR into Reg_Sequence	2013-03-05 15:04:49 +00:00
SI
SPARC
Thumb	llvm/test/CodeGen/Thumb/iabs.ll: Add explicit -mtriple=thumb-unknown-unknown to appease win32 hosts.	2013-03-05 02:18:52 +00:00
Thumb2	SDAG: Handle scalarizing an extend of a <1 x iN> vector.	2013-03-07 05:47:54 +00:00
X86	Move testcase, this is testing extraction not inserting.	2013-03-07 18:51:02 +00:00
XCore