Eric Christopher 5427edeb68 Check register class matching instead of width of type matching ... when determining validity of matching constraint. Allow i1 types access to the GR8 reg class for x86. Fixes PR10352 and rdar://9777108 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135180 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-14 20:13:52 +00:00
..
Alpha
ARM	Add a testcase for r135123.	2011-07-14 06:23:09 +00:00
Blackfin	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CBackend	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CellSPU
CPP
Generic	Comment correction.	2011-07-12 03:39:22 +00:00
MBlaze
Mips
MSP430
PowerPC	test/CodeGen/PowerPC/vector.ll: Tweak redirection >%t >%t to >%t >>%t. See also r134814 (test/CodeGen/X86/vector.ll).	2011-07-11 16:21:52 +00:00
PTX
SPARC
SystemZ
Thumb	Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.	2011-07-07 03:55:05 +00:00
Thumb2	Improve codegen for select's:	2011-07-13 00:42:17 +00:00
X86	Check register class matching instead of width of type matching	2011-07-14 20:13:52 +00:00
XCore