llvm-6502/test/MC
Rafael Espindola 33f014f298 Convert two tests to use llvm-readobj.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220308 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-21 18:24:31 +00:00
..
AArch64 [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
ARM [ARM] NEON 32-bit scalar moves are also available in VFPv2 2014-10-21 11:49:14 +00:00
AsmParser MC: AsmLexer: handle multi-character CommentStrings correctly 2014-08-14 02:51:43 +00:00
COFF MC, COFF: Make bigobj test compatible with python3 2014-10-14 22:35:11 +00:00
Disassembler [X86] Fix a bug where the disassembler was ignoring the VEX.W bit in 32-bit mode for certain instructions it shouldn't. 2014-10-07 07:29:50 +00:00
ELF Add back commits r219835 and a fixed version of r219829. 2014-10-17 01:48:58 +00:00
MachO Convert two tests to use llvm-readobj. 2014-10-21 18:24:31 +00:00
Markup MC: Simple example parser for MC assembly markup. 2012-10-31 23:24:13 +00:00
Mips [mips][microMIPS] Implement ADDU16 and SUBU16 instructions 2014-10-21 08:44:58 +00:00
PowerPC [PPC64] VSX indexed-form loads use wrong instruction format 2014-10-09 17:51:35 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ Exclude known and bugzilled failures from UBSan bootstrap 2014-09-17 20:17:52 +00:00
X86 [AVX512] Add DQ subvector inserts 2014-10-15 23:42:17 +00:00