llvm-6502/utils/TableGen
Tom Stellard b461e8304c Target: Allow target specific operand types
This adds two new fields to the RegisterOperand TableGen class:

string OperandNamespace = "MCOI";
string OperandType = "OPERAND_REGISTER";

These fields can be used to specify a target specific operand type,
which will be stored in the OperandType member of the MCOperandInfo
object.

This can be useful for targets that need to store some extra information
about operands that cannot be expressed using the target independent
types.  For example, in the R600 backend, there are operands which
can take either registers or immediates and it is convenient to be able
to specify this in the TableGen definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225661 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-12 19:33:09 +00:00
..
AsmMatcherEmitter.cpp Fix some formatting in tablegen output. 2015-01-03 08:16:29 +00:00
AsmWriterEmitter.cpp On behalf of Matthew Wahab: 2014-12-16 18:16:17 +00:00
AsmWriterInst.cpp Remove dead code. 2014-11-25 20:11:29 +00:00
AsmWriterInst.h Remove dead code. 2014-11-25 20:11:29 +00:00
CallingConvEmitter.cpp [tablegen] Add CustomCallingConv and use it to tablegen-erate the outermost parts of the Mips O32 implementation 2014-11-01 17:38:22 +00:00
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp Clean up static analyzer warnings. 2014-12-12 21:48:03 +00:00
CodeGenDAGPatterns.h Revert "Improve memory ownership/management in TableGen by unique_ptrifying TreePattern's Tree member." 2014-11-17 22:55:41 +00:00
CodeGenInstruction.cpp Target: Allow target specific operand types 2015-01-12 19:33:09 +00:00
CodeGenInstruction.h Remove neverHasSideEffects support from TableGen CodeGenInstruction. Everyone should use hasSideEffects now. 2014-11-26 04:11:14 +00:00
CodeGenIntrinsics.h
CodeGenMapTable.cpp
CodeGenRegisters.cpp Clean up static analyzer warnings. 2014-12-12 21:48:03 +00:00
CodeGenRegisters.h Tablegen'erate lanemasks for register units. 2014-12-10 01:12:56 +00:00
CodeGenSchedule.cpp Use range-based for loops. NFC. 2014-12-09 08:05:51 +00:00
CodeGenSchedule.h
CodeGenTarget.cpp Masked Load/Store - Changed the order of parameters in intrinsics. 2014-12-25 07:49:20 +00:00
CodeGenTarget.h Use unique_ptr instead of DeleteContainerSeconds. 2014-12-10 06:18:57 +00:00
CTagsEmitter.cpp
DAGISelEmitter.cpp Use unique_ptr to remove explicit delete. 2014-12-15 00:40:07 +00:00
DAGISelMatcher.cpp
DAGISelMatcher.h Use unique_ptr to remove explicit delete. 2014-12-15 00:40:07 +00:00
DAGISelMatcherEmitter.cpp Use unique_ptr to handle ownership of TreePatterns in CodeGenDAGPatterns::PatternFragments 2014-11-13 21:40:02 +00:00
DAGISelMatcherGen.cpp Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vector<CodeGenRegisterClass*> 2014-12-03 19:58:45 +00:00
DAGISelMatcherOpt.cpp Use unique_ptr to remove explicit delete. 2014-12-15 00:40:07 +00:00
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
FastISelEmitter.cpp Change order of tablegen generated fast-isel instruction code to be 2014-11-14 21:05:45 +00:00
FixedLenDecoderEmitter.cpp Use range-based for loops. 2014-12-13 05:12:19 +00:00
InstrInfoEmitter.cpp Target: Allow target specific operand types 2015-01-12 19:33:09 +00:00
IntrinsicEmitter.cpp Masked Load/Store - Changed the order of parameters in intrinsics. 2014-12-25 07:49:20 +00:00
LLVMBuild.txt
Makefile
module.modulemap
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp Tablegen'erate lanemasks for register units. 2014-12-10 01:12:56 +00:00
SequenceToOffsetTable.h Reduce size of some tables in tablegen register info output. 2014-11-22 18:30:18 +00:00
SubtargetEmitter.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
TableGen.cpp Use range-based for loops. NFC 2014-12-11 07:04:54 +00:00
TableGenBackends.h
tdtags
X86DisassemblerShared.h
X86DisassemblerTables.cpp [X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present. 2015-01-03 00:00:20 +00:00
X86DisassemblerTables.h [X86] Make the instructions that use AdSize16/32/64 co-exist together without using mode predicates. 2015-01-02 07:02:25 +00:00
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized. 2015-01-08 07:41:30 +00:00
X86RecognizableInstr.h [X86] Remove the single AdSize indicator and replace it with separate AdSize16/32/64 flags. 2014-12-24 06:05:22 +00:00