Eric Christopher 34720e193f Allow lr in the register options here. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133935 91177308-0d34-0410-b5e6-96231b3b80d8		2011-06-27 20:31:01 +00:00
..
Alpha
ARM	Allow lr in the register options here.	2011-06-27 20:31:01 +00:00
Blackfin	Remove support for parsing the "type i32" syntax for defining a numbered	2011-06-19 00:03:46 +00:00
CBackend	Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the CBackend by emitting definitions for each intrinsic that occurs in the module.	2011-06-21 17:18:15 +00:00
CellSPU
CPP
Generic	Handle debug info for i128 constants.	2011-06-24 20:46:11 +00:00
MBlaze
Mips	Change the chain input of nodes that load the address of a function. This change	2011-06-24 19:01:25 +00:00
MSP430
PowerPC	Don't apply on PPC64 the 32bit ADDIC optimizations as there's no overflow	2011-06-20 15:28:39 +00:00
PTX	PTX: corrected tests that were failing	2011-06-25 19:41:17 +00:00
SPARC
SystemZ
Thumb	rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is	2011-06-18 06:05:24 +00:00
Thumb2	Remove support for parsing the "type i32" syntax for defining a numbered	2011-06-19 00:03:46 +00:00
X86	Move all inline-asm-fpstack tests to a single file.	2011-06-27 17:27:37 +00:00
XCore