Evan Cheng 34729256e8 When coalescing an EXTRACT_SUBREG and the dst register is a physical register, ... the source register will be coalesced to the super register of the LHS. Properly merge in the live ranges of the resulting coalesced interval that were part of the original source interval to the live interval of the super-register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42961 91177308-0d34-0410-b5e6-96231b3b80d8		2007-10-14 10:08:34 +00:00
..
Analysis	Bindings for the verifier.	2007-10-06 21:00:36 +00:00
Archive	finishing touches of bytecode -> bitcode changes. also unbreak Windows	2007-07-06 20:28:40 +00:00
AsmParser	Next PPC long double bits. First cut at constants.	2007-10-11 18:07:22 +00:00
Bitcode	Next PPC long double bits. First cut at constants.	2007-10-11 18:07:22 +00:00
CodeGen	When coalescing an EXTRACT_SUBREG and the dst register is a physical register,	2007-10-14 10:08:34 +00:00
Debugger	switch this to bitcode instead of bytecode	2007-05-06 09:29:13 +00:00
ExecutionEngine	Fix an assertion abort on sparc. malloc(0) is allowed to	2007-10-11 19:40:35 +00:00
Linker	Use correct parentheses with the '&& "..."' idiom in an assert.	2007-10-08 15:13:30 +00:00
Support	If the power of 5 is exact, and the reciprocal exact, the error is zero not one half-ulps. This prevents an infinite loop in rare cases.	2007-10-13 03:34:08 +00:00
System	really fix PR1581, thanks to Daniel Dunbar for pointing	2007-09-28 20:50:50 +00:00
Target	Revert 42908 for now.	2007-10-14 05:57:21 +00:00
Transforms	Dest type is always i8 *. This allows some simplification.	2007-10-12 20:10:21 +00:00
VMCore	Disable some compile-time optimizations on PPC	2007-10-14 01:56:47 +00:00
Makefile	build lib/Archive instead of lib/Bytecode	2007-05-06 19:50:06 +00:00