mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6462 91177308-0d34-0410-b5e6-96231b3b80d8
148 lines
4.7 KiB
C++
148 lines
4.7 KiB
C++
//===-- SparcV9CodeEmitter.cpp - --------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetMachine.h"
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#include "SparcInternals.h"
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#include "SparcV9CodeEmitter.h"
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MachineCodeEmitter * SparcV9CodeEmitter::MCE = 0;
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TargetMachine * SparcV9CodeEmitter::TM = 0;
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bool UltraSparc::addPassesToEmitMachineCode(PassManager &PM,
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MachineCodeEmitter &MCE) {
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//PM.add(new SparcV9CodeEmitter(MCE));
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//MachineCodeEmitter *M = MachineCodeEmitter::createDebugMachineCodeEmitter();
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MachineCodeEmitter *M =
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MachineCodeEmitter::createFilePrinterMachineCodeEmitter(MCE);
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PM.add(new SparcV9CodeEmitter(this, *M));
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PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
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return false;
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}
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void SparcV9CodeEmitter::emitConstant(unsigned Val, unsigned Size) {
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// Output the constant in big endian byte order...
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unsigned byteVal;
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for (int i = Size-1; i >= 0; --i) {
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byteVal = Val >> 8*i;
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MCE->emitByte(byteVal & 255);
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}
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}
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unsigned getRealRegNum(unsigned fakeReg, unsigned regClass) {
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switch (regClass) {
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case UltraSparcRegInfo::IntRegType: {
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// Sparc manual, p31
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static const unsigned IntRegMap[] = {
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// "o0", "o1", "o2", "o3", "o4", "o5", "o7",
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8, 9, 10, 11, 12, 13, 15,
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// "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
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16, 17, 18, 19, 20, 21, 22, 23,
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// "i0", "i1", "i2", "i3", "i4", "i5",
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24, 25, 26, 27, 28, 29,
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// "i6", "i7",
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30, 31,
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// "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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0, 1, 2, 3, 4, 5, 6, 7,
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// "o6"
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14
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};
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return IntRegMap[fakeReg];
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break;
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}
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case UltraSparcRegInfo::FPSingleRegType: {
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return fakeReg;
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}
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case UltraSparcRegInfo::FPDoubleRegType: {
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return fakeReg;
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}
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case UltraSparcRegInfo::FloatCCRegType: {
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return fakeReg;
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}
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case UltraSparcRegInfo::IntCCRegType: {
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return fakeReg;
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}
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default:
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assert(0 && "Invalid unified register number in getRegType");
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return fakeReg;
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}
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}
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int64_t SparcV9CodeEmitter::getMachineOpValue(MachineInstr &MI,
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MachineOperand &MO) {
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if (MO.isPhysicalRegister()) {
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// This is necessary because the Sparc doesn't actually lay out registers
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// in the real fashion -- it skips those that it chooses not to allocate,
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// i.e. those that are the SP, etc.
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unsigned fakeReg = MO.getReg(), realReg, regClass, regType;
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regType = TM->getRegInfo().getRegType(fakeReg);
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// At least map fakeReg into its class
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fakeReg = TM->getRegInfo().getClassRegNum(fakeReg, regClass);
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// Find the real register number for use in an instruction
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realReg = getRealRegNum(fakeReg, regClass);
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std::cerr << "Reg[" << fakeReg << "] = " << realReg << "\n";
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return realReg;
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} else if (MO.isImmediate()) {
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return MO.getImmedValue();
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} else if (MO.isPCRelativeDisp()) {
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std::cerr << "Saving reference to BB (PCRelDisp)\n";
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MCE->saveBBreference((BasicBlock*)MO.getVRegValue(), MI);
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return 0;
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} else if (MO.isMachineBasicBlock()) {
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std::cerr << "Saving reference to BB (MBB)\n";
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MCE->saveBBreference(MO.getMachineBasicBlock()->getBasicBlock(), MI);
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return 0;
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} else if (MO.isFrameIndex()) {
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std::cerr << "ERROR: Frame index unhandled.\n";
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return 0;
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} else if (MO.isConstantPoolIndex()) {
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std::cerr << "ERROR: Constant Pool index unhandled.\n";
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return 0;
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} else if (MO.isGlobalAddress()) {
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std::cerr << "ERROR: Global addr unhandled.\n";
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return 0;
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} else if (MO.isExternalSymbol()) {
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std::cerr << "ERROR: External symbol unhandled.\n";
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return 0;
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} else {
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std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
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//abort();
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return 0;
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}
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}
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unsigned SparcV9CodeEmitter::getValueBit(int64_t Val, unsigned bit) {
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Val >>= bit;
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return (Val & 1);
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}
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bool SparcV9CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
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MCE->startFunction(MF);
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MCE->emitConstantPool(MF.getConstantPool());
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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emitBasicBlock(*I);
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MCE->finishFunction(MF);
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return false;
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}
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void SparcV9CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
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currBB = MBB.getBasicBlock();
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MCE->startBasicBlock(MBB);
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
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emitInstruction(**I);
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}
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void SparcV9CodeEmitter::emitInstruction(MachineInstr &MI) {
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emitConstant(getBinaryCodeForInstr(MI), 4);
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}
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#include "SparcV9CodeEmitter.inc"
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