llvm-6502/utils/TableGen
Andrew Trick 13745262a8 Added instregex support to TableGen subtarget emitter.
This allows the processor-specific machine model to override selected
base opcodes without any fanciness.
e.g. InstRW<[CoreXWriteVANDP], (instregex "VANDP")>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 23:06:32 +00:00
..
AsmMatcherEmitter.cpp [ms-inline asm] Default to the 'm' constraint. This matches the behavior of the 2012-10-03 22:18:38 +00:00
AsmWriterEmitter.cpp
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub). 2012-09-19 22:15:06 +00:00
CodeGenDAGPatterns.h Refactor Record* by-ID comparator to Record.h 2012-09-19 01:47:00 +00:00
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenRegisters.cpp Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 2012-09-27 10:14:43 +00:00
CodeGenRegisters.h Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 2012-09-27 10:14:43 +00:00
CodeGenSchedule.cpp Added instregex support to TableGen subtarget emitter. 2012-10-03 23:06:32 +00:00
CodeGenSchedule.h Added instregex support to TableGen subtarget emitter. 2012-10-03 23:06:32 +00:00
CodeGenTarget.cpp Add in new data types that are used by AMDIL/ANL among others. 2012-09-19 22:47:07 +00:00
CodeGenTarget.h
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
EDEmitter.cpp
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp
InstrInfoEmitter.cpp TableGen subtarget emitter. Use getSchedClassIdx. 2012-09-18 03:55:55 +00:00
IntrinsicEmitter.cpp
LLVMBuild.txt
Makefile
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp
SequenceToOffsetTable.h
SetTheory.cpp Added instregex support to TableGen subtarget emitter. 2012-10-03 23:06:32 +00:00
SetTheory.h
StringToOffsetTable.h
SubtargetEmitter.cpp TableGen subtarget emitter, nearly first class support for SchedAlias. 2012-10-03 23:06:28 +00:00
TableGen.cpp tblgen: Migrate llvm-tblgen to new TableGenMain API. 2012-10-03 21:29:19 +00:00
TableGenBackends.h
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 2012-09-19 06:37:45 +00:00
X86RecognizableInstr.h Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 2012-09-19 06:37:45 +00:00