llvm-6502/include/llvm/Target
2009-11-12 07:13:11 +00:00
..
SubtargetFeature.h Move DataTypes.h to include/llvm/System, update all users. This breaks the last 2009-10-26 01:35:46 +00:00
Target.td Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a 2009-10-29 18:10:34 +00:00
TargetAsmParser.h
TargetCallingConv.td
TargetData.h all targets should be required to declare legal integer types. My plan to 2009-11-07 18:53:00 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h Use explicit structs instead of std::pair to map callee saved regs to spill slots. 2009-09-27 17:58:47 +00:00
TargetInstrDesc.h Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a 2009-10-29 18:10:34 +00:00
TargetInstrInfo.h Missed this. 2009-11-07 04:07:30 +00:00
TargetInstrItineraries.h
TargetIntrinsicInfo.h Reintroduce support for overloading target intrinsics 2009-11-05 03:19:08 +00:00
TargetJITInfo.h Move DataTypes.h to include/llvm/System, update all users. This breaks the last 2009-10-26 01:35:46 +00:00
TargetLowering.h isLegalICmpImmediate should take a signed integer; code clean up. 2009-11-12 07:13:11 +00:00
TargetLoweringObjectFile.h Pass StringRef by value. 2009-11-06 10:58:06 +00:00
TargetMachine.h Add a CodeGenOpt::Less level to match -O1. It'll be used by clients which do not want post-regalloc scheduling. 2009-10-16 21:02:20 +00:00
TargetMachOWriterInfo.h
TargetOptions.h
TargetRegisterInfo.h Adjust the scavenge register spilling to allow the target to choose an 2009-10-19 22:27:30 +00:00
TargetRegistry.h Pass StringRef by value. 2009-11-06 10:58:06 +00:00
TargetSchedule.td
TargetSelect.h
TargetSelectionDAG.td Add a couple more target nodes 2009-11-03 03:30:51 +00:00
TargetSubtarget.h Fixed to address code review. No functional changes. 2009-11-10 00:48:55 +00:00