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a70f28ce7d
The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
76 lines
1.7 KiB
LLVM
76 lines
1.7 KiB
LLVM
; Ensure that multiplication is lowered to function calls when the multiplier
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; unit is not available in the hardware and that function calls are not used
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; when the multiplier unit is available in the hardware.
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;
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; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
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; RUN: llc < %s -march=mblaze -mattr=+div | FileCheck -check-prefix=DIV %s
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define i8 @test_i8(i8 %a, i8 %b) {
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; FUN: test_i8:
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; DIV: test_i8:
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%tmp.1 = udiv i8 %a, %b
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; FUN-NOT: idiv
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; FUN: brlid
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; DIV-NOT: brlid
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; DIV: idivu
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%tmp.2 = sdiv i8 %a, %b
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; FUN-NOT: idiv
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; FUN: brlid
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; DIV-NOT: brlid
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; DIV-NOT: idivu
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; DIV: idiv
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%tmp.3 = add i8 %tmp.1, %tmp.2
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ret i8 %tmp.3
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; FUN: rtsd
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; DIV: rtsd
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}
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define i16 @test_i16(i16 %a, i16 %b) {
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; FUN: test_i16:
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; DIV: test_i16:
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%tmp.1 = udiv i16 %a, %b
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; FUN-NOT: idiv
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; FUN: brlid
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; DIV-NOT: brlid
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; DIV: idivu
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%tmp.2 = sdiv i16 %a, %b
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; FUN-NOT: idiv
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; FUN: brlid
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; DIV-NOT: brlid
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; DIV-NOT: idivu
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; DIV: idiv
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%tmp.3 = add i16 %tmp.1, %tmp.2
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ret i16 %tmp.3
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; FUN: rtsd
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; DIV: rtsd
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}
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define i32 @test_i32(i32 %a, i32 %b) {
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; FUN: test_i32:
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; DIV: test_i32:
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%tmp.1 = udiv i32 %a, %b
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; FUN-NOT: idiv
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; FUN: brlid
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; DIV-NOT: brlid
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; DIV: idivu
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%tmp.2 = sdiv i32 %a, %b
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; FUN-NOT: idiv
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; FUN: brlid
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; DIV-NOT: brlid
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; DIV-NOT: idivu
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; DIV: idiv
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%tmp.3 = add i32 %tmp.1, %tmp.2
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ret i32 %tmp.3
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; FUN: rtsd
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; DIV: rtsd
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}
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