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https://github.com/c64scene-ar/llvm-6502.git
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2926869b4a
actually *removes* one of the operands, instead of just assigning both operands the same register. This make reasoning about instructions unnecessarily complex, because you need to know if you are before or after register allocation to match up operand #'s with the target description file. Changing this also gets rid of a bunch of hacky code in various places. This patch also includes changes to fold loads into cmp/test instructions in the X86 backend, along with a significant simplification to the X86 spill folding code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
87 lines
3.4 KiB
C++
87 lines
3.4 KiB
C++
//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the X86 implementation of the MRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86REGISTERINFO_H
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#define X86REGISTERINFO_H
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#include "llvm/Target/MRegisterInfo.h"
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#include "X86GenRegisterInfo.h.inc"
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namespace llvm {
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class Type;
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class TargetInstrInfo;
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struct X86RegisterInfo : public X86GenRegisterInfo {
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const TargetInstrInfo &TII;
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X86RegisterInfo(const TargetInstrInfo &tii);
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/// Code Generation virtual methods...
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, int FrameIndex,
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const TargetRegisterClass *RC) const;
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIndex,
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const TargetRegisterClass *RC) const;
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void copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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/// foldMemoryOperand - If this target supports it, fold a load or store of
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/// the specified stack slot into the specified machine instruction for the
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/// specified operand. If this is possible, the target should perform the
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/// folding and return true, otherwise it should return false. If it folds
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/// the instruction, it is likely that the MachineInstruction the iterator
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/// references has been changed.
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MachineInstr* foldMemoryOperand(MachineInstr* MI,
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unsigned OpNum,
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int FrameIndex) const;
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/// getCalleeSaveRegs - Return a null-terminated list of all of the
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/// callee-save registers on this target.
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const unsigned *getCalleeSaveRegs() const;
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/// getCalleeSaveRegClasses - Return a null-terminated list of the preferred
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/// register classes to spill each callee-saved register with. The order and
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/// length of this list match the getCalleeSaveRegs() list.
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const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator MI) const;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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void emitPrologue(MachineFunction &MF) const;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
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// Debug information queries.
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unsigned getRARegister() const;
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unsigned getFrameRegister(MachineFunction &MF) const;
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};
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// getX86SubSuperRegister - X86 utility function. It returns the sub or super
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// register of a specific X86 register.
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// e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
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unsigned getX86SubSuperRegister(unsigned, MVT::ValueType, bool High=false);
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} // End llvm namespace
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#endif
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