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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33723 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
1.2 KiB
Plaintext
26 lines
1.2 KiB
Plaintext
//===---------------------------------------------------------------------===//
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// Random ideas for the ARM backend (Thumb specific).
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//===---------------------------------------------------------------------===//
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* Add support for compiling functions in both ARM and Thumb mode, then taking
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the smallest.
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* Add support for compiling individual basic blocks in thumb mode, when in a
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larger ARM function. This can be used for presumed cold code, like paths
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to abort (failure path of asserts), EH handling code, etc.
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* Thumb doesn't have normal pre/post increment addressing modes, but you can
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load/store 32-bit integers with pre/postinc by using load/store multiple
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instrs with a single register.
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* Make better use of high registers r8, r10, r11, r12 (ip). Some variants of add
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and cmp instructions can use high registers. Also, we can use them as
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temporaries to spill values into.
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* If we know function size is less than (1 << 16) * 2 bytes, we can use 16-bit
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jumptable entries (e.g. (L1 - L2) >> 1). Or even smaller entries if the
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function is even smaller. This also applies to ARM.
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* In thumb mode, short, byte, and bool preferred alignments are currently set
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to 4 to accommodate ISA restriction (i.e. add sp, #imm, imm must be multiple
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of 4).
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