mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-22 07:32:48 +00:00
40e455d992
SI_IF and SI_ELSE are terminators which also produce a value. For these instructions ISel always inserts a COPY to move their value to another basic block. This COPY ends up between SI_(IF|ELSE) and the S_BRANCH* instruction at the end of the block. This breaks MachineBasicBlock::getFirstTerminator() and also the machine verifier which assumes that terminators are grouped together at the end of blocks. To solve this we coalesce the copy away right after ISel to make sure there are no instructions in between terminators at the end of blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207591 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
2.1 KiB
LLVM
55 lines
2.1 KiB
LLVM
; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
|
|
; RUN: llc < %s -march=r600 --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK
|
|
|
|
; R600-CHECK-LABEL: @sqrt_f32
|
|
; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
|
|
; R600-CHECK: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS
|
|
; SI-CHECK-LABEL: @sqrt_f32
|
|
; SI-CHECK: V_SQRT_F32_e32
|
|
define void @sqrt_f32(float addrspace(1)* %out, float %in) {
|
|
entry:
|
|
%0 = call float @llvm.sqrt.f32(float %in)
|
|
store float %0, float addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; R600-CHECK-LABEL: @sqrt_v2f32
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS
|
|
; SI-CHECK-LABEL: @sqrt_v2f32
|
|
; SI-CHECK: V_SQRT_F32_e32
|
|
; SI-CHECK: V_SQRT_F32_e32
|
|
define void @sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
|
|
entry:
|
|
%0 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
|
|
store <2 x float> %0, <2 x float> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; R600-CHECK-LABEL: @sqrt_v4f32
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS
|
|
; SI-CHECK-LABEL: @sqrt_v4f32
|
|
; SI-CHECK: V_SQRT_F32_e32
|
|
; SI-CHECK: V_SQRT_F32_e32
|
|
; SI-CHECK: V_SQRT_F32_e32
|
|
; SI-CHECK: V_SQRT_F32_e32
|
|
define void @sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
|
|
entry:
|
|
%0 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
|
|
store <4 x float> %0, <4 x float> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
declare float @llvm.sqrt.f32(float %in)
|
|
declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
|
|
declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
|