llvm-6502/test/CodeGen/ARM64/fcopysign.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

52 lines
1.4 KiB
LLVM

; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck %s
; rdar://9332258
define float @test1(float %x, float %y) nounwind {
entry:
; CHECK-LABEL: test1:
; CHECK: movi.4s v2, #128, lsl #24
; CHECK: bit.16b v0, v1, v2
%0 = tail call float @copysignf(float %x, float %y) nounwind readnone
ret float %0
}
define double @test2(double %x, double %y) nounwind {
entry:
; CHECK-LABEL: test2:
; CHECK: movi.2d v2, #0
; CHECK: fneg.2d v2, v2
; CHECK: bit.16b v0, v1, v2
%0 = tail call double @copysign(double %x, double %y) nounwind readnone
ret double %0
}
; rdar://9545768
define double @test3(double %a, float %b, float %c) nounwind {
; CHECK-LABEL: test3:
; CHECK: fcvt d1, s1
; CHECK: fneg.2d v2, v{{[0-9]+}}
; CHECK: bit.16b v0, v1, v2
%tmp1 = fadd float %b, %c
%tmp2 = fpext float %tmp1 to double
%tmp = tail call double @copysign( double %a, double %tmp2 ) nounwind readnone
ret double %tmp
}
define float @test4() nounwind {
entry:
; CHECK-LABEL: test4:
; CHECK: fcvt s0, d0
; CHECK: movi.4s v[[CONST:[0-9]+]], #128, lsl #24
; CHECK: bit.16b v{{[0-9]+}}, v0, v[[CONST]]
%0 = tail call double (...)* @bar() nounwind
%1 = fptrunc double %0 to float
%2 = tail call float @copysignf(float 5.000000e-01, float %1) nounwind readnone
%3 = fadd float %1, %2
ret float %3
}
declare double @bar(...)
declare double @copysign(double, double) nounwind readnone
declare float @copysignf(float, float) nounwind readnone