llvm-6502/test/CodeGen/ARM64/icmp-opt.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

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409 B
LLVM

; RUN: llc < %s -march=arm64 | FileCheck %s
; Optimize (x > -1) to (x >= 0) etc.
; Optimize (cmp (add / sub), 0): eliminate the subs used to update flag
; for comparison only
; rdar://10233472
define i32 @t1(i64 %a) nounwind ssp {
entry:
; CHECK-LABEL: t1:
; CHECK-NOT: movn
; CHECK: cmp x0, #0
; CHECK: csinc w0, wzr, wzr, lt
%cmp = icmp sgt i64 %a, -1
%conv = zext i1 %cmp to i32
ret i32 %conv
}