Weiming Zhao e56764bad1 Remove hard coded registers in ARM ldrexd and strexd instructions ... This patch replaces the hard coded GPR pair [R0, R1] of Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with even/odd GPRPair reg class. Similar to the lowering of atomic_64 operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168207 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-16 21:55:34 +00:00
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ARMAsmLexer.cpp	Prune some includes	2012-03-27 07:54:11 +00:00
ARMAsmParser.cpp	Remove hard coded registers in ARM ldrexd and strexd instructions	2012-11-16 21:55:34 +00:00
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LLVMBuild.txt
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