mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
36019aa5c6
eliminating an and for Nate's testcase: int %bar(int %a, int %b) { entry: %tmp.1 = setne int %a, 0 %tmp.2 = setne int %b, 0 %tmp.3 = or bool %tmp.1, %tmp.2 %retval = cast bool %tmp.3 to int ret int %retval } generating: _bar: addic r2, r3, -1 subfe r2, r2, r3 addic r3, r4, -1 subfe r3, r3, r4 or r3, r2, r3 blr instead of: _bar: addic r2, r3, -1 subfe r2, r2, r3 addic r3, r4, -1 subfe r3, r3, r4 or r2, r2, r3 rlwinm r3, r2, 0, 31, 31 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21315 91177308-0d34-0410-b5e6-96231b3b80d8 |
||
---|---|---|
.. | ||
SelectionDAG | ||
AsmPrinter.cpp | ||
BranchFolding.cpp | ||
IntrinsicLowering.cpp | ||
LiveInterval.cpp | ||
LiveInterval.h | ||
LiveIntervalAnalysis.cpp | ||
LiveIntervalAnalysis.h | ||
LiveVariables.cpp | ||
MachineBasicBlock.cpp | ||
MachineCodeEmitter.cpp | ||
MachineFunction.cpp | ||
MachineInstr.cpp | ||
Makefile | ||
Passes.cpp | ||
PHIElimination.cpp | ||
PhysRegTracker.h | ||
PrologEpilogInserter.cpp | ||
RegAllocIterativeScan.cpp | ||
RegAllocLinearScan.cpp | ||
RegAllocLocal.cpp | ||
RegAllocSimple.cpp | ||
TwoAddressInstructionPass.cpp | ||
UnreachableBlockElim.cpp | ||
VirtRegMap.cpp | ||
VirtRegMap.h |