llvm-6502/test/CodeGen/ARM/arm-abi-attr.ll
Eric Christopher 360cbd4839 Model ARM backend ABI selection after the front end code doing the
same. This will change the "bare metal" ABI from APCS to AAPCS.

The only difference between the front and back end code is that
the code for Triple::GNU was added for environment. That will migrate
to the front end shortly.

Tests updated with the ABI they were originally testing in the case
of bare metal (e.g. -mtriple armv7) or with a -gnu for arm-linux
triples.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224489 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-18 02:08:45 +00:00

29 lines
833 B
LLVM

; RUN: llc -mtriple=arm-linux-gnu < %s | FileCheck %s --check-prefix=APCS
; RUN: llc -mtriple=arm-linux-gnu -mattr=apcs < %s | \
; RUN: FileCheck %s --check-prefix=APCS
; RUN: llc -mtriple=arm-linux-gnueabi -mattr=apcs < %s | \
; RUN: FileCheck %s --check-prefix=APCS
; RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s --check-prefix=AAPCS
; RUN: llc -mtriple=arm-linux-gnueabi -mattr=aapcs < %s | \
; RUN: FileCheck %s --check-prefix=AAPCS
; RUN: llc -mtriple=arm-linux-gnu -mattr=aapcs < %s | \
; RUN: FileCheck %s --check-prefix=AAPCS
; The stack is 8 byte aligned on AAPCS and 4 on APCS, so we should get a BIC
; only on APCS.
define void @g() {
; APCS: sub sp, sp, #8
; APCS: bic sp, sp, #7
; AAPCS: sub sp, sp, #8
; AAPCS-NOT: bic
%c = alloca i8, align 8
call void @f(i8* %c)
ret void
}
declare void @f(i8*)