mirror of
https://github.com/c64scene-ar/llvm-6502.git
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5510728d28
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189728 91177308-0d34-0410-b5e6-96231b3b80d8
390 lines
15 KiB
C++
390 lines
15 KiB
C++
//===-- PPCMachObjectWriter.cpp - PPC Mach-O Writer -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include "MCTargetDesc/PPCFixupKinds.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/MachO.h"
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using namespace llvm;
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namespace {
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class PPCMachObjectWriter : public MCMachObjectTargetWriter {
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bool RecordScatteredRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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unsigned Log2Size, uint64_t &FixedValue);
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void RecordPPCRelocation(MachObjectWriter *Writer, const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup,
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MCValue Target, uint64_t &FixedValue);
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public:
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PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype,
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/*UseAggressiveSymbolFolding=*/Is64Bit) {}
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void RecordRelocation(MachObjectWriter *Writer, const MCAssembler &Asm,
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const MCAsmLayout &Layout, const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue) {
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if (Writer->is64Bit()) {
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report_fatal_error("Relocation emission for MachO/PPC64 unimplemented.");
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} else
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RecordPPCRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
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FixedValue);
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}
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};
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}
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/// computes the log2 of the size of the relocation,
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/// used for relocation_info::r_length.
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static unsigned getFixupKindLog2Size(unsigned Kind) {
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switch (Kind) {
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default:
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report_fatal_error("log2size(FixupKind): Unhandled fixup kind!");
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case FK_PCRel_1:
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case FK_Data_1:
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return 0;
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case FK_PCRel_2:
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case FK_Data_2:
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return 1;
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case FK_PCRel_4:
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case PPC::fixup_ppc_brcond14:
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case PPC::fixup_ppc_half16:
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case PPC::fixup_ppc_br24:
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case FK_Data_4:
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return 2;
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case FK_PCRel_8:
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case FK_Data_8:
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return 3;
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}
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return 0;
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}
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/// Translates generic PPC fixup kind to Mach-O/PPC relocation type enum.
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/// Outline based on PPCELFObjectWriter::getRelocTypeInner().
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static unsigned getRelocType(const MCValue &Target,
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const MCFixupKind FixupKind, // from
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// Fixup.getKind()
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const bool IsPCRel) {
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const MCSymbolRefExpr::VariantKind Modifier =
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Target.isAbsolute() ? MCSymbolRefExpr::VK_None
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: Target.getSymA()->getKind();
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// determine the type of the relocation
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unsigned Type = MachO::GENERIC_RELOC_VANILLA;
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if (IsPCRel) { // relative to PC
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switch ((unsigned)FixupKind) {
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default:
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report_fatal_error("Unimplemented fixup kind (relative)");
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case PPC::fixup_ppc_br24:
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Type = MachO::PPC_RELOC_BR24; // R_PPC_REL24
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break;
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case PPC::fixup_ppc_brcond14:
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Type = MachO::PPC_RELOC_BR14;
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break;
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case PPC::fixup_ppc_half16:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported modifier for half16 fixup");
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case MCSymbolRefExpr::VK_PPC_HA:
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Type = MachO::PPC_RELOC_HA16;
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break;
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case MCSymbolRefExpr::VK_PPC_LO:
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Type = MachO::PPC_RELOC_LO16;
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break;
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case MCSymbolRefExpr::VK_PPC_HI:
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Type = MachO::PPC_RELOC_HI16;
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break;
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}
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break;
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}
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} else {
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switch ((unsigned)FixupKind) {
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default:
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report_fatal_error("Unimplemented fixup kind (absolute)!");
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case PPC::fixup_ppc_half16:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported modifier for half16 fixup");
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case MCSymbolRefExpr::VK_PPC_HA:
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Type = MachO::PPC_RELOC_HA16_SECTDIFF;
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break;
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case MCSymbolRefExpr::VK_PPC_LO:
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Type = MachO::PPC_RELOC_LO16_SECTDIFF;
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break;
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case MCSymbolRefExpr::VK_PPC_HI:
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Type = MachO::PPC_RELOC_HI16_SECTDIFF;
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break;
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}
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break;
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case FK_Data_4:
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break;
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case FK_Data_2:
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break;
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}
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}
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return Type;
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}
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static void makeRelocationInfo(MachO::any_relocation_info &MRE,
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const uint32_t FixupOffset, const uint32_t Index,
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const unsigned IsPCRel, const unsigned Log2Size,
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const unsigned IsExtern, const unsigned Type) {
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MRE.r_word0 = FixupOffset;
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// The bitfield offsets that work (as determined by trial-and-error)
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// are different than what is documented in the mach-o manuals.
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// This appears to be an endianness issue; reversing the order of the
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// documented bitfields in <llvm/Support/MachO.h> fixes this (but
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// breaks x86/ARM assembly).
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MRE.r_word1 = ((Index << 8) | // was << 0
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(IsPCRel << 7) | // was << 24
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(Log2Size << 5) | // was << 25
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(IsExtern << 4) | // was << 27
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(Type << 0)); // was << 28
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}
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static void
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makeScatteredRelocationInfo(MachO::any_relocation_info &MRE,
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const uint32_t Addr, const unsigned Type,
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const unsigned Log2Size, const unsigned IsPCRel,
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const uint32_t Value2) {
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// For notes on bitfield positions and endianness, see:
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// https://developer.apple.com/library/mac/documentation/developertools/conceptual/MachORuntime/Reference/reference.html#//apple_ref/doc/uid/20001298-scattered_relocation_entry
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MRE.r_word0 = ((Addr << 0) | (Type << 24) | (Log2Size << 28) |
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(IsPCRel << 30) | MachO::R_SCATTERED);
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MRE.r_word1 = Value2;
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}
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/// Compute fixup offset (address).
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static uint32_t getFixupOffset(const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup) {
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uint32_t FixupOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
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// On Mach-O, ppc_fixup_half16 relocations must refer to the
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// start of the instruction, not the second halfword, as ELF does
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if (unsigned(Fixup.getKind()) == PPC::fixup_ppc_half16)
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FixupOffset &= ~uint32_t(3);
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return FixupOffset;
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}
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/// \return false if falling back to using non-scattered relocation,
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/// otherwise true for normal scattered relocation.
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/// based on X86MachObjectWriter::RecordScatteredRelocation
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/// and ARMMachObjectWriter::RecordScatteredRelocation
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bool PPCMachObjectWriter::RecordScatteredRelocation(
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MachObjectWriter *Writer, const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
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unsigned Log2Size, uint64_t &FixedValue) {
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// caller already computes these, can we just pass and reuse?
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const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup);
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const MCFixupKind FK = Fixup.getKind();
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const unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, FK);
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const unsigned Type = getRelocType(Target, FK, IsPCRel);
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// Is this a local or SECTDIFF relocation entry?
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// SECTDIFF relocation entries have symbol subtractions,
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// and require two entries, the first for the add-symbol value,
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// the second for the subtract-symbol value.
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// See <reloc.h>.
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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MCSymbolData *A_SD = &Asm.getSymbolData(*A);
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if (!A_SD->getFragment())
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report_fatal_error("symbol '" + A->getName() +
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"' can not be undefined in a subtraction expression");
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uint32_t Value = Writer->getSymbolAddress(A_SD, Layout);
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uint64_t SecAddr =
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Writer->getSectionAddress(A_SD->getFragment()->getParent());
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FixedValue += SecAddr;
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uint32_t Value2 = 0;
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if (const MCSymbolRefExpr *B = Target.getSymB()) {
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MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());
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if (!B_SD->getFragment())
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report_fatal_error("symbol '" + B->getSymbol().getName() +
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"' can not be undefined in a subtraction expression");
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// FIXME: is Type correct? see include/llvm/Support/MachO.h
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Value2 = Writer->getSymbolAddress(B_SD, Layout);
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FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
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}
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// FIXME: does FixedValue get used??
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// Relocations are written out in reverse order, so the PAIR comes first.
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if (Type == MachO::PPC_RELOC_SECTDIFF ||
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Type == MachO::PPC_RELOC_HI16_SECTDIFF ||
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Type == MachO::PPC_RELOC_LO16_SECTDIFF ||
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Type == MachO::PPC_RELOC_HA16_SECTDIFF ||
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Type == MachO::PPC_RELOC_LO14_SECTDIFF ||
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Type == MachO::PPC_RELOC_LOCAL_SECTDIFF) {
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// X86 had this piece, but ARM does not
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// If the offset is too large to fit in a scattered relocation,
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// we're hosed. It's an unfortunate limitation of the MachO format.
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if (FixupOffset > 0xffffff) {
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char Buffer[32];
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format("0x%x", FixupOffset).print(Buffer, sizeof(Buffer));
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Asm.getContext().FatalError(Fixup.getLoc(),
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Twine("Section too large, can't encode "
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"r_address (") +
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Buffer + ") into 24 bits of scattered "
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"relocation entry.");
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llvm_unreachable("fatal error returned?!");
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}
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// Is this supposed to follow MCTarget/PPCAsmBackend.cpp:adjustFixupValue()?
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// see PPCMCExpr::EvaluateAsRelocatableImpl()
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uint32_t other_half = 0;
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switch (Type) {
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case MachO::PPC_RELOC_LO16_SECTDIFF:
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other_half = (FixedValue >> 16) & 0xffff;
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// applyFixupOffset longer extracts the high part because it now assumes
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// this was already done.
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// It looks like this is not true for the FixedValue needed with Mach-O
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// relocs.
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// So we need to adjust FixedValue again here.
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FixedValue &= 0xffff;
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break;
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case MachO::PPC_RELOC_HA16_SECTDIFF:
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other_half = FixedValue & 0xffff;
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FixedValue =
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((FixedValue >> 16) + ((FixedValue & 0x8000) ? 1 : 0)) & 0xffff;
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break;
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case MachO::PPC_RELOC_HI16_SECTDIFF:
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other_half = FixedValue & 0xffff;
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FixedValue = (FixedValue >> 16) & 0xffff;
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break;
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default:
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llvm_unreachable("Invalid PPC scattered relocation type.");
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break;
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}
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MachO::any_relocation_info MRE;
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makeScatteredRelocationInfo(MRE, other_half, MachO::GENERIC_RELOC_PAIR,
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Log2Size, IsPCRel, Value2);
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Writer->addRelocation(Fragment->getParent(), MRE);
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} else {
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// If the offset is more than 24-bits, it won't fit in a scattered
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// relocation offset field, so we fall back to using a non-scattered
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// relocation. This is a bit risky, as if the offset reaches out of
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// the block and the linker is doing scattered loading on this
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// symbol, things can go badly.
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//
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// Required for 'as' compatibility.
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if (FixupOffset > 0xffffff)
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return false;
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}
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MachO::any_relocation_info MRE;
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makeScatteredRelocationInfo(MRE, FixupOffset, Type, Log2Size, IsPCRel, Value);
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Writer->addRelocation(Fragment->getParent(), MRE);
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return true;
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}
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// see PPCELFObjectWriter for a general outline of cases
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void PPCMachObjectWriter::RecordPPCRelocation(
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MachObjectWriter *Writer, const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue) {
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const MCFixupKind FK = Fixup.getKind(); // unsigned
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const unsigned Log2Size = getFixupKindLog2Size(FK);
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const bool IsPCRel = Writer->isFixupKindPCRel(Asm, FK);
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const unsigned RelocType = getRelocType(Target, FK, IsPCRel);
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// If this is a difference or a defined symbol plus an offset, then we need a
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// scattered relocation entry. Differences always require scattered
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// relocations.
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if (Target.getSymB() &&
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// Q: are branch targets ever scattered?
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RelocType != MachO::PPC_RELOC_BR24 &&
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RelocType != MachO::PPC_RELOC_BR14) {
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RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
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Log2Size, FixedValue);
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return;
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}
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// this doesn't seem right for RIT_PPC_BR24
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// Get the symbol data, if any.
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MCSymbolData *SD = 0;
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if (Target.getSymA())
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SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());
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// See <reloc.h>.
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const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup);
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unsigned Index = 0;
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unsigned IsExtern = 0;
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unsigned Type = RelocType;
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if (Target.isAbsolute()) { // constant
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// SymbolNum of 0 indicates the absolute section.
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//
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// FIXME: Currently, these are never generated (see code below). I cannot
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// find a case where they are actually emitted.
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report_fatal_error("FIXME: relocations to absolute targets "
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"not yet implemented");
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// the above line stolen from ARM, not sure
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} else {
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// Resolve constant variables.
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if (SD->getSymbol().isVariable()) {
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int64_t Res;
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if (SD->getSymbol().getVariableValue()->EvaluateAsAbsolute(
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Res, Layout, Writer->getSectionAddressMap())) {
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FixedValue = Res;
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return;
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}
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}
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// Check whether we need an external or internal relocation.
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if (Writer->doesSymbolRequireExternRelocation(SD)) {
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IsExtern = 1;
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Index = SD->getIndex();
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// For external relocations, make sure to offset the fixup value to
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// compensate for the addend of the symbol address, if it was
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// undefined. This occurs with weak definitions, for example.
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if (!SD->Symbol->isUndefined())
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FixedValue -= Layout.getSymbolOffset(SD);
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} else {
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// The index is the section ordinal (1-based).
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const MCSectionData &SymSD =
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Asm.getSectionData(SD->getSymbol().getSection());
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Index = SymSD.getOrdinal() + 1;
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FixedValue += Writer->getSectionAddress(&SymSD);
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}
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if (IsPCRel)
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FixedValue -= Writer->getSectionAddress(Fragment->getParent());
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}
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// struct relocation_info (8 bytes)
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MachO::any_relocation_info MRE;
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makeRelocationInfo(MRE, FixupOffset, Index, IsPCRel, Log2Size, IsExtern,
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Type);
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Writer->addRelocation(Fragment->getParent(), MRE);
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}
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MCObjectWriter *llvm::createPPCMachObjectWriter(raw_ostream &OS, bool Is64Bit,
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uint32_t CPUType,
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uint32_t CPUSubtype) {
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return createMachObjectWriter(
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new PPCMachObjectWriter(Is64Bit, CPUType, CPUSubtype), OS,
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/*IsLittleEndian=*/false);
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}
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