llvm-6502/test/CodeGen/AArch64/compare-branch.ll
Tim Northover 72062f5744 Add AArch64 as an experimental target.
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.

This initial commit should have support for:
    + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
      (except the late addition CRC instructions).
    + CodeGen features required for C++03 and C99.
    + Compilation for the "small" memory model: code+static data <
      4GB.
    + Absolute and position-independent code.
    + GNU-style (i.e. "__thread") TLS.
    + Debugging information.

The principal omission, currently, is performance tuning.

This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.

Further reviews would be gratefully received.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31 12:12:40 +00:00

38 lines
805 B
LLVM

; RUN: llc -verify-machineinstrs < %s -march=aarch64 | FileCheck %s
@var32 = global i32 0
@var64 = global i64 0
define void @foo() {
; CHECK: foo:
%val1 = load volatile i32* @var32
%tst1 = icmp eq i32 %val1, 0
br i1 %tst1, label %end, label %test2
; CHECK: cbz {{w[0-9]+}}, .LBB
test2:
%val2 = load volatile i32* @var32
%tst2 = icmp ne i32 %val2, 0
br i1 %tst2, label %end, label %test3
; CHECK: cbnz {{w[0-9]+}}, .LBB
test3:
%val3 = load volatile i64* @var64
%tst3 = icmp eq i64 %val3, 0
br i1 %tst3, label %end, label %test4
; CHECK: cbz {{x[0-9]+}}, .LBB
test4:
%val4 = load volatile i64* @var64
%tst4 = icmp ne i64 %val4, 0
br i1 %tst4, label %end, label %test5
; CHECK: cbnz {{x[0-9]+}}, .LBB
test5:
store volatile i64 %val4, i64* @var64
ret void
end:
ret void
}