mirror of
https://github.com/c64scene-ar/llvm-6502.git
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27b1252c13
This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
119 lines
2.4 KiB
LLVM
119 lines
2.4 KiB
LLVM
; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s --check-prefix=ARM
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; RUN: llc -mtriple=arm-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - \
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; RUN: | FileCheck %s --check-prefix=ARMT2
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; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - \
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; RUN: | FileCheck %s --check-prefix=THUMB2
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define i32 @t1(i32 %c) nounwind readnone {
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entry:
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; ARM-LABEL: t1:
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; ARM: mov [[R1:r[0-9]+]], #101
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; ARM: orr [[R1b:r[0-9]+]], [[R1]], #256
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; ARM: movgt {{r[0-1]}}, #123
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; ARMT2-LABEL: t1:
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; ARMT2: movw [[R:r[0-1]]], #357
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; ARMT2: movwgt [[R]], #123
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; THUMB2-LABEL: t1:
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; THUMB2: movw [[R:r[0-1]]], #357
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; THUMB2: movgt [[R]], #123
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%0 = icmp sgt i32 %c, 1
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%1 = select i1 %0, i32 123, i32 357
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ret i32 %1
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}
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define i32 @t2(i32 %c) nounwind readnone {
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entry:
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; ARM-LABEL: t2:
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; ARM: mov [[R:r[0-9]+]], #101
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; ARM: orr [[R]], [[R]], #256
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; ARM: movle [[R]], #123
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; ARMT2-LABEL: t2:
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; ARMT2: mov [[R:r[0-1]]], #123
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; ARMT2: movwgt [[R]], #357
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; THUMB2-LABEL: t2:
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; THUMB2: mov{{(s|\.w)}} [[R:r[0-1]]], #123
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; THUMB2: movwgt [[R]], #357
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%0 = icmp sgt i32 %c, 1
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%1 = select i1 %0, i32 357, i32 123
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ret i32 %1
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}
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define i32 @t3(i32 %a) nounwind readnone {
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entry:
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; ARM-LABEL: t3:
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; ARM: mov [[R:r[0-1]]], #0
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; ARM: moveq [[R]], #1
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; ARMT2-LABEL: t3:
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; ARMT2: mov [[R:r[0-1]]], #0
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; ARMT2: movweq [[R]], #1
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; THUMB2-LABEL: t3:
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; THUMB2: mov{{(s|\.w)}} [[R:r[0-1]]], #0
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; THUMB2: moveq [[R]], #1
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%0 = icmp eq i32 %a, 160
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%1 = zext i1 %0 to i32
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ret i32 %1
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}
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define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind {
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entry:
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; ARM-LABEL: t4:
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; ARM: ldr
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; ARM: mov{{lt|ge}}
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; ARMT2-LABEL: t4:
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; ARMT2: movwlt [[R0:r[0-9]+]], #65365
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; ARMT2: movtlt [[R0]], #65365
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; THUMB2-LABEL: t4:
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; THUMB2: mvnlt [[R0:r[0-9]+]], #11141290
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%0 = icmp slt i32 %a, %b
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%1 = select i1 %0, i32 4283826005, i32 %x
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ret i32 %1
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}
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; rdar://9758317
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define i32 @t5(i32 %a) nounwind {
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entry:
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; ARM-LABEL: t5:
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; ARM-NOT: mov
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; ARM: cmp r0, #1
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; ARM-NOT: mov
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; ARM: movne r0, #0
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; THUMB2-LABEL: t5:
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; THUMB2-NOT: mov
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; THUMB2: cmp r0, #1
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; THUMB2: it ne
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; THUMB2: movne r0, #0
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%cmp = icmp eq i32 %a, 1
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @t6(i32 %a) nounwind {
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entry:
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; ARM-LABEL: t6:
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; ARM-NOT: mov
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; ARM: cmp r0, #0
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; ARM: movne r0, #1
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; THUMB2-LABEL: t6:
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; THUMB2-NOT: mov
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; THUMB2: cmp r0, #0
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; THUMB2: it ne
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; THUMB2: movne r0, #1
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%tobool = icmp ne i32 %a, 0
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%lnot.ext = zext i1 %tobool to i32
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ret i32 %lnot.ext
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}
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