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e072ed71c8
This changes ARM64 to use separate operands for each component of an address, and look for separate '[', '$Rn, ..., ']' tokens when parsing. This allows us to do away with quite a bit of special C++ code to handle monolithic "addressing modes" in the MC components. The more incremental matching of the assembler operands also allows for better diagnostics when LLVM is presented with invalid input. Most of the complexity here is with the register-offset instructions, which were extremely dodgy beforehand: even when the instruction used wM, LLVM's model had xM as an operand. We papered over this discrepancy before, but that approach doesn't work now so I split them into separate X and W variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209425 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| AArch64 | ||
| ARM | ||
| ARM64 | ||
| AsmParser | ||
| COFF | ||
| Disassembler | ||
| ELF | ||
| MachO | ||
| Markup | ||
| Mips | ||
| PowerPC | ||
| Sparc | ||
| SystemZ | ||
| X86 | ||