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https://github.com/c64scene-ar/llvm-6502.git
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e7006bb04b
This transform was originally added in r185257 but later removed in r185415. The original transform would create instructions speculatively and then discard them if the speculation was proved incorrect. This has been replaced with a scheme that splits the transform into two parts: preflight and fold. While we preflight, we build up fold actions that inform the folding stage on how to act. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185667 91177308-0d34-0410-b5e6-96231b3b80d8
76 lines
1.8 KiB
LLVM
76 lines
1.8 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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define i32 @t1(i16 zeroext %x, i32 %y) nounwind {
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entry:
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; CHECK: t1
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; CHECK-NOT: sdiv
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; CHECK: lshr i32 %conv
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%conv = zext i16 %x to i32
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%s = shl i32 2, %y
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%d = sdiv i32 %conv, %s
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ret i32 %d
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}
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; rdar://11721329
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define i64 @t2(i64 %x, i32 %y) nounwind {
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; CHECK: t2
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; CHECK-NOT: udiv
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; CHECK: lshr i64 %x
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%1 = shl i32 1, %y
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%2 = zext i32 %1 to i64
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%3 = udiv i64 %x, %2
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ret i64 %3
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}
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; PR13250
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define i64 @t3(i64 %x, i32 %y) nounwind {
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; CHECK: t3
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; CHECK-NOT: udiv
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; CHECK-NEXT: %1 = add i32 %y, 2
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; CHECK-NEXT: %2 = zext i32 %1 to i64
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; CHECK-NEXT: %3 = lshr i64 %x, %2
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; CHECK-NEXT: ret i64 %3
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%1 = shl i32 4, %y
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%2 = zext i32 %1 to i64
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%3 = udiv i64 %x, %2
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ret i64 %3
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}
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define i32 @t4(i32 %x, i32 %y) nounwind {
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; CHECK: t4
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; CHECK-NOT: udiv
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %y, 5
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 5, i32 %y
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; CHECK-NEXT: [[SHR:%.*]] = lshr i32 %x, [[SEL]]
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; CHECK-NEXT: ret i32 [[SHR]]
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%1 = shl i32 1, %y
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%2 = icmp ult i32 %1, 32
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%3 = select i1 %2, i32 32, i32 %1
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%4 = udiv i32 %x, %3
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ret i32 %4
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}
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define i32 @t5(i1 %x, i1 %y, i32 %V) nounwind {
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; CHECK: t5
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; CHECK-NOT: udiv
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; CHECK-NEXT: [[SEL1:%.*]] = select i1 %x, i32 5, i32 6
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; CHECK-NEXT: [[SEL2:%.*]] = select i1 %y, i32 [[SEL1]], i32 %V
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 %V, [[SEL2]]
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; CHECK-NEXT: ret i32 [[LSHR]]
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%1 = shl i32 1, %V
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%2 = select i1 %x, i32 32, i32 64
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%3 = select i1 %y, i32 %2, i32 %1
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%4 = udiv i32 %V, %3
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ret i32 %4
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}
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define i32 @t6(i32 %x, i32 %z) nounwind{
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; CHECK: t6
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 0
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; CHECK-NOT: udiv i32 %z, %x
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%x_is_zero = icmp eq i32 %x, 0
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%divisor = select i1 %x_is_zero, i32 1, i32 %x
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%y = udiv i32 %z, %divisor
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ret i32 %y
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}
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