llvm-6502/test/CodeGen
Akira Hatanaka 36bcc11236 Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as
single-precision load and store.

Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect
to map unaligned floating point load/store nodes to these instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 18:16:49 +00:00
..
ARM Clear kill flags in removeCopyByCommutingDef(). 2012-07-31 02:47:24 +00:00
CellSPU Implement r160312 as target indepedenet dag combine. 2012-07-17 08:31:11 +00:00
CPP test commit 2012-07-18 17:53:05 +00:00
Generic Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be wider than the output element type. Make sure to trunc them if needed. 2012-07-15 20:39:08 +00:00
Hexagon Enable all Hexagon tests. 2012-05-15 16:13:12 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as 2012-07-31 18:16:49 +00:00
MSP430 These tests used intrinsics with the wrong prototype. They weren't caught because 2012-05-27 19:35:41 +00:00
NVPTX Add llvm.fabs intrinsic. 2012-05-28 21:48:37 +00:00
PowerPC Fix the remaining TCL-style quotes found in the testsuite. This is 2012-07-02 19:09:46 +00:00
SPARC test/CodeGen/SPARC/private.ll: Fixup. Forgot to prune old RUN lines. 2012-07-03 04:29:20 +00:00
Thumb Fix the remaining TCL-style quotes found in the testsuite. This is 2012-07-02 19:09:46 +00:00
Thumb2 [arm-fast-isel] Add support for vararg function calls. 2012-07-19 09:49:00 +00:00
X86 MachineSink: Sort the successors before trying to find SuccToSinkTo. 2012-07-31 18:10:39 +00:00
XCore Fix pattern for MKMSK instruction. 2012-06-13 17:59:12 +00:00