mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
39 lines
2.1 KiB
ArmAsm
39 lines
2.1 KiB
ArmAsm
// RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -o - %s | FileCheck %s
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// RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -filetype=obj -o - %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-OBJ %s
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movz x2, #:abs_g0:sym
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movk w3, #:abs_g0_nc:sym
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// CHECK: movz x2, #:abs_g0:sym // encoding: [0bAAA00010,A,0b100AAAAA,0x92]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g0:sym, kind: fixup_arm64_movw
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// CHECK: movk w3, #:abs_g0_nc:sym // encoding: [0bAAA00011,A,0b100AAAAA,0x72]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g0_nc:sym, kind: fixup_arm64_movw
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// CHECK-OBJ: 0 R_AARCH64_MOVW_UABS_G0 sym
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// CHECK-OBJ: 4 R_AARCH64_MOVW_UABS_G0_NC sym
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movz x4, #:abs_g1:sym
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movk w5, #:abs_g1_nc:sym
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// CHECK: movz x4, #:abs_g1:sym // encoding: [0bAAA00100,A,0b101AAAAA,0x92]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g1:sym, kind: fixup_arm64_movw
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// CHECK: movk w5, #:abs_g1_nc:sym // encoding: [0bAAA00101,A,0b101AAAAA,0x72]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g1_nc:sym, kind: fixup_arm64_movw
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// CHECK-OBJ: 8 R_AARCH64_MOVW_UABS_G1 sym
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// CHECK-OBJ: c R_AARCH64_MOVW_UABS_G1_NC sym
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movz x6, #:abs_g2:sym
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movk x7, #:abs_g2_nc:sym
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// CHECK: movz x6, #:abs_g2:sym // encoding: [0bAAA00110,A,0b110AAAAA,0x92]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g2:sym, kind: fixup_arm64_movw
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// CHECK: movk x7, #:abs_g2_nc:sym // encoding: [0bAAA00111,A,0b110AAAAA,0xf2]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g2_nc:sym, kind: fixup_arm64_movw
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// CHECK-OBJ: 10 R_AARCH64_MOVW_UABS_G2 sym
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// CHECK-OBJ: 14 R_AARCH64_MOVW_UABS_G2_NC sym
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movz x8, #:abs_g3:sym
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// CHECK: movz x8, #:abs_g3:sym // encoding: [0bAAA01000,A,0b111AAAAA,0x92]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g3:sym, kind: fixup_arm64_movw
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// CHECK-OBJ: 18 R_AARCH64_MOVW_UABS_G3 sym
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