Matt Arsenault 3cd8cf6bbd R600/SI: Add FP mode bits to binary. ... The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-26 17:22:30 +00:00
..
InstPrinter	Fix missing words in sentence	2014-06-23 18:00:26 +00:00
MCTargetDesc	Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert.	2014-06-19 06:10:58 +00:00
TargetInfo
AMDGPU.h
AMDGPU.td	R600: Trivial subtarget feature cleanups.	2014-06-20 06:50:05 +00:00
AMDGPUAsmPrinter.cpp	R600/SI: Add FP mode bits to binary.	2014-06-26 17:22:30 +00:00
AMDGPUAsmPrinter.h	R600/SI: Add FP mode bits to binary.	2014-06-26 17:22:30 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td	R600: Fix inconsistency in rsq instructions.	2014-06-24 22:13:39 +00:00
AMDGPUInstructions.td	R600: Fix inconsistency in rsq instructions.	2014-06-24 22:13:39 +00:00
AMDGPUIntrinsicInfo.cpp	R600: Rename AMDIL file	2014-06-23 18:00:31 +00:00
AMDGPUIntrinsicInfo.h	R600: Rename AMDIL file	2014-06-23 18:00:31 +00:00
AMDGPUIntrinsics.td	R600: Fix inconsistency in rsq instructions.	2014-06-24 22:13:39 +00:00
AMDGPUISelDAGToDAG.cpp	R600/SI: Use a ComplexPattern for MUBUF stores	2014-06-24 23:33:07 +00:00
AMDGPUISelLowering.cpp	Silencing a warning about isZExtFree hiding an inherited virtual function. No functional change intended.	2014-06-26 13:45:47 +00:00
AMDGPUISelLowering.h	Silencing a warning about isZExtFree hiding an inherited virtual function. No functional change intended.	2014-06-26 13:45:47 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h	Alphabetize forward declarations	2014-06-23 18:00:20 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h	R600: Trivial subtarget feature cleanups.	2014-06-20 06:50:05 +00:00
AMDGPUTargetMachine.cpp
AMDGPUTargetMachine.h	R600: Rename AMDIL file	2014-06-23 18:00:31 +00:00
AMDGPUTargetTransformInfo.cpp
AMDILCFGStructurizer.cpp
CaymanInstructions.td
CMakeLists.txt	R600: Remove AMDILISelLowering	2014-06-23 18:00:55 +00:00
EvergreenInstructions.td
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td	R600: Fix inconsistency in rsq instructions.	2014-06-24 22:13:39 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	R600: Fix inconsistency in rsq instructions.	2014-06-24 22:13:39 +00:00
R600ISelLowering.h	R600: Remove AMDILISelLowering	2014-06-23 18:00:55 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp	R600/SI: SI Control Flow Annotation bug fixed	2014-06-20 17:06:02 +00:00
SIDefines.h	R600/SI: Add FP mode bits to binary.	2014-06-26 17:22:30 +00:00
SIFixSGPRCopies.cpp
SIInsertWaits.cpp	R600/SI: Add intrinsics for various math instructions.	2014-06-19 01:19:19 +00:00
SIInstrFormats.td	R600/SI: Make sure target flags are set on pseudo VOP3 instructions	2014-06-17 19:34:46 +00:00
SIInstrInfo.cpp	R600/SI: Verify restrictions on div_scale operands.	2014-06-23 18:28:31 +00:00
SIInstrInfo.h
SIInstrInfo.td	R600/SI: Use a ComplexPattern for MUBUF stores	2014-06-24 23:33:07 +00:00
SIInstructions.td	R600/SI: Use a ComplexPattern for MUBUF stores	2014-06-24 23:33:07 +00:00
SIIntrinsics.td	R600/SI: add gather4 and getlod intrinsics (v3)	2014-06-18 22:00:29 +00:00
SIISelLowering.cpp	R600: Promote i64 stores to v2i32	2014-06-24 23:33:04 +00:00
SIISelLowering.h
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td	R600/SI: add gather4 and getlod intrinsics (v3)	2014-06-18 22:00:29 +00:00
SISchedule.td
SITypeRewriter.cpp