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f98f2ce29e
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
22 lines
813 B
LLVM
22 lines
813 B
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; The code generated by sdiv is long and complex and may frequently change.
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; The goal of this test is to make sure the ISel doesn't fail.
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;
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; This program was previously failing to compile when one of the selectcc
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; opcodes generated by the sdiv lowering was being legalized and optimized to:
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; selectcc Remainder -1, 0, -1, SETGT
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; This was fixed by adding an additional pattern in R600Instructions.td to
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; match this pattern with a CNDGE_INT.
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; CHECK: RETURN
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define void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in
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%den = load i32 addrspace(1) * %den_ptr
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%result = sdiv i32 %num, %den
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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