llvm-6502/lib/CodeGen
Chris Lattner ecea5635f8 Another nice speedup for the register allocator. This time, we replace
the Virt2PhysRegMap std::map with an std::vector.  This speeds up the
register allocator another (almost) 40%, from .72->.45s in a release build
of LLC on 253.perlbmk.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11219 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-09 02:12:04 +00:00
..
InstrSched
ModuloScheduling
SelectionDAG
IntrinsicLowering.cpp
LiveIntervalAnalysis.cpp Change live interval representation. Machine instructions now have two 2004-02-05 22:55:25 +00:00
LiveIntervalAnalysis.h
LiveVariables.cpp Ugh, perform an optimization that GCC should be able to do itself. This 2004-02-09 01:43:23 +00:00
MachineCodeEmitter.cpp
MachineCodeForInstruction.cpp
MachineFunction.cpp
MachineInstr.cpp
MachineInstrAnnot.cpp
Makefile
Passes.cpp
PHIElimination.cpp
PrologEpilogInserter.cpp
RegAllocLinearScan.cpp Increase code clarity. 2004-02-06 18:08:18 +00:00
RegAllocLocal.cpp Another nice speedup for the register allocator. This time, we replace 2004-02-09 02:12:04 +00:00
RegAllocSimple.cpp
TwoAddressInstructionPass.cpp Added missing include. 2004-02-05 05:04:39 +00:00