llvm-6502/test
Chandler Carruth 37bb4b0365 [x86] Teach the new vector shuffle lowering how to cleverly lower single
input v8f32 shuffles which are not 128-bit lane crossing but have
different shuffle patterns in the low and high lanes. This removes most
of the extract/insert traffic that was unnecessary and is particularly
good at lowering cases where only one of the two lanes is shuffled at
all.

I've also added a collection of test cases with undef lanes because this
lowering is somewhat more sensitive to undef lanes than others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218226 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-21 23:46:13 +00:00
..
Analysis
Assembler
Bindings
Bitcode
BugPoint
CodeGen [x86] Teach the new vector shuffle lowering how to cleverly lower single 2014-09-21 23:46:13 +00:00
DebugInfo Update tests which broke from r218189 2014-09-20 21:18:43 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO Try to fix i686-cygming bots. 2014-09-18 22:56:00 +00:00
MC MC: Support aligned COMMON symbols for COFF 2014-09-21 09:18:07 +00:00
Object
Other
TableGen
tools llvm-readobj: pretty-print special COFF section names 2014-09-20 00:25:06 +00:00
Transforms
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh