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https://github.com/c64scene-ar/llvm-6502.git
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37cdad3e59
in DAGISelEmitter output. This bug was recently uncovered by the addition of patterns for CALL32m and CALL64m, which are nodes that now have both MemOperands and variadic_ops. This bug was especially visible with PIC in various configurations, because the new patterns are matching the indirect call code used in many PIC configurations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51877 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AsmWriterEmitter.cpp | ||
AsmWriterEmitter.h | ||
CallingConvEmitter.cpp | ||
CallingConvEmitter.h | ||
CodeEmitterGen.cpp | ||
CodeEmitterGen.h | ||
CodeGenDAGPatterns.cpp | ||
CodeGenDAGPatterns.h | ||
CodeGenInstruction.cpp | ||
CodeGenInstruction.h | ||
CodeGenIntrinsics.h | ||
CodeGenRegisters.h | ||
CodeGenTarget.cpp | ||
CodeGenTarget.h | ||
DAGISelEmitter.cpp | ||
DAGISelEmitter.h | ||
InstrEnumEmitter.cpp | ||
InstrEnumEmitter.h | ||
InstrInfoEmitter.cpp | ||
InstrInfoEmitter.h | ||
IntrinsicEmitter.cpp | ||
IntrinsicEmitter.h | ||
LLVMCConfigurationEmitter.cpp | ||
LLVMCConfigurationEmitter.h | ||
Makefile | ||
Record.cpp | ||
Record.h | ||
RegisterInfoEmitter.cpp | ||
RegisterInfoEmitter.h | ||
SubtargetEmitter.cpp | ||
SubtargetEmitter.h | ||
TableGen.cpp | ||
TableGenBackend.cpp | ||
TableGenBackend.h | ||
TGLexer.cpp | ||
TGLexer.h | ||
TGParser.cpp | ||
TGParser.h |