llvm-6502/test/CodeGen/Mips/msa
Daniel Sanders e85dd7c26d [mips] Correct lowering of VECTOR_SHUFFLE to VSHF.
Summary:
VECTOR_SHUFFLE concatenates the vectors in an vectorwise fashion.
  <0b00, 0b01> + <0b10, 0b11> -> <0b00, 0b01, 0b10, 0b11>
VSHF concatenates the vectors in a bitwise fashion:
  <0b00, 0b01> + <0b10, 0b11> ->
  0b0100       + 0b1110       -> 0b01001110
                                 <0b10, 0b11, 0b00, 0b01>
We must therefore swap the operands to get the correct result.

The test case that discovered the issue was MultiSource/Benchmarks/nbench.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204480 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 16:56:51 +00:00
..
2r_vector_scalar.ll
2r.ll
2rf_exup.ll
2rf_float_int.ll
2rf_fq.ll
2rf_int_float.ll
2rf_tq.ll
2rf.ll
3r_4r_widen.ll
3r_4r.ll
3r_splat.ll
3r-a.ll
3r-b.ll
3r-c.ll
3r-d.ll
3r-i.ll
3r-m.ll
3r-p.ll
3r-s.ll
3r-v.ll
3rf_4rf_q.ll
3rf_4rf.ll
3rf_exdo.ll
3rf_float_int.ll
3rf_int_float.ll
3rf_q.ll
3rf.ll
arithmetic_float.ll
arithmetic.ll
basic_operations_float.ll
basic_operations.ll
bit.ll
bitcast.ll
bitwise.ll [mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern. 2014-03-12 11:54:00 +00:00
compare_float.ll [mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern. 2014-03-12 11:54:00 +00:00
compare.ll [mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern. 2014-03-12 11:54:00 +00:00
elm_copy.ll
elm_cxcmsa.ll
elm_insv.ll
elm_move.ll
elm_shift_slide.ll
endian.ll
frameindex.ll
i5_ld_st.ll
i5-a.ll
i5-b.ll
i5-c.ll
i5-m.ll
i5-s.ll
i8.ll
i10.ll
inline-asm.ll
llvm-stress-s449609655-simplified.ll
llvm-stress-s525530439.ll
llvm-stress-s997348632.ll
llvm-stress-s1704963983.ll
llvm-stress-s1935737938.ll
llvm-stress-s2090927243-simplified.ll
llvm-stress-s2501752154-simplified.ll
llvm-stress-s2704903805.ll
llvm-stress-s3861334421.ll
llvm-stress-s3926023935.ll
llvm-stress-s3997499501.ll
llvm-stress-sz1-s742806235.ll
shift-dagcombine.ll
shuffle.ll [mips] Correct lowering of VECTOR_SHUFFLE to VSHF. 2014-03-21 16:56:51 +00:00
special.ll
spill.ll
vec.ll [mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern. 2014-03-12 11:54:00 +00:00
vecs10.ll