Evan Cheng 37fefc20d3 Follow up to r138791. ...

Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138810 91177308-0d34-0410-b5e6-96231b3b80d8

2011-08-30 19:09:48 +00:00

..

CMakeLists.txt

Rewrite the CMake build to use explicit dependencies between libraries,

2011-07-29 00:14:25 +00:00

DAGCombiner.cpp

Roll back the rest of r126557. It's a hack that will break in some obscure cases.

2011-08-19 22:39:31 +00:00

FastISel.cpp

FastISel: avoid function calls between the materialization of the constant and its use.

2011-08-18 22:06:10 +00:00

FunctionLoweringInfo.cpp

Add the support in code-gen for the landingpad instruction lowering.

2011-08-17 21:56:44 +00:00

InstrEmitter.cpp

Follow up to r138791.

2011-08-30 19:09:48 +00:00

InstrEmitter.h

- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and

2011-06-28 19:10:37 +00:00

LegalizeDAG.cpp

Atomic load/store on ARM/Thumb.

2011-08-26 02:59:24 +00:00

LegalizeFloatTypes.cpp

Silence a bunch (but not all) "variable written but not read" warnings

2011-08-12 14:54:45 +00:00

LegalizeIntegerTypes.cpp

Misc optimizer+codegen work for 'cmpxchg' and 'atomicrmw'. They appear to be

2011-07-29 03:05:32 +00:00

LegalizeTypes.cpp

land David Blaikie's patch to de-constify Type, with a few tweaks.

2011-07-18 04:54:35 +00:00

LegalizeTypes.h

Add an intrinsic and codegen support for fused multiply-accumulate. The intent

2011-07-08 21:39:21 +00:00

LegalizeTypesGeneric.cpp

…

LegalizeVectorOps.cpp

[VECTOR-SELECT]

2011-07-14 11:11:14 +00:00

LegalizeVectorTypes.cpp

Be less redundant.

2011-08-22 18:26:12 +00:00

Makefile

…

ScheduleDAGFast.cpp

- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and

2011-06-28 19:10:37 +00:00

ScheduleDAGList.cpp

…

ScheduleDAGRRList.cpp

- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and

2011-06-28 19:10:37 +00:00

ScheduleDAGSDNodes.cpp

Rename TargetSubtarget to TargetSubtargetInfo for consistency.

2011-07-01 21:01:15 +00:00

ScheduleDAGSDNodes.h

The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped.

2011-06-27 18:34:12 +00:00

SDNodeDbgValue.h

…

SDNodeOrdering.h

…

SelectionDAG.cpp

Basic x86 code generation for atomic load and store instructions.

2011-08-24 20:50:09 +00:00

SelectionDAGBuilder.cpp

Atomic load/store on ARM/Thumb.

2011-08-26 02:59:24 +00:00

SelectionDAGBuilder.h

Basic x86 code generation for atomic load and store instructions.

2011-08-24 20:50:09 +00:00

SelectionDAGISel.cpp

Follow up to r138791.

2011-08-30 19:09:48 +00:00

SelectionDAGPrinter.cpp

…

TargetLowering.cpp

New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.

2011-08-03 21:06:02 +00:00

TargetSelectionDAGInfo.cpp

…