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When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
151 lines
5.2 KiB
C++
151 lines
5.2 KiB
C++
//===-- PTXSelectionDAGInfo.cpp - PTX SelectionDAG Info -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the PTXSelectionDAGInfo class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "ptx-selectiondag-info"
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#include "PTXTargetMachine.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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using namespace llvm;
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PTXSelectionDAGInfo::PTXSelectionDAGInfo(const TargetMachine &TM)
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: TargetSelectionDAGInfo(TM),
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Subtarget(&TM.getSubtarget<PTXSubtarget>()) {
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}
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PTXSelectionDAGInfo::~PTXSelectionDAGInfo() {
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}
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SDValue
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PTXSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
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SDValue Chain,
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SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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bool isVolatile, bool AlwaysInline,
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MachinePointerInfo DstPtrInfo,
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MachinePointerInfo SrcPtrInfo) const {
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// Do repeated 4-byte loads and stores. To be improved.
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// This requires 4-byte alignment.
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if ((Align & 3) != 0)
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return SDValue();
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// This requires the copy size to be a constant, preferably
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// within a subtarget-specific limit.
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ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
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if (!ConstantSize)
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return SDValue();
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uint64_t SizeVal = ConstantSize->getZExtValue();
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// Always inline memcpys. In PTX, we do not have a C library that provides
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// a memcpy function.
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//if (!AlwaysInline)
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// return SDValue();
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unsigned BytesLeft = SizeVal & 3;
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unsigned NumMemOps = SizeVal >> 2;
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unsigned EmittedNumMemOps = 0;
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EVT VT = MVT::i32;
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unsigned VTSize = 4;
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unsigned i = 0;
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const unsigned MAX_LOADS_IN_LDM = 6;
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SDValue TFOps[MAX_LOADS_IN_LDM];
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SDValue Loads[MAX_LOADS_IN_LDM];
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uint64_t SrcOff = 0, DstOff = 0;
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EVT PointerType = Subtarget->is64Bit() ? MVT::i64 : MVT::i32;
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// Emit up to MAX_LOADS_IN_LDM loads, then a TokenFactor barrier, then the
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// same number of stores. The loads and stores will get combined into
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// ldm/stm later on.
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while (EmittedNumMemOps < NumMemOps) {
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for (i = 0;
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i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
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Loads[i] = DAG.getLoad(VT, dl, Chain,
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DAG.getNode(ISD::ADD, dl, PointerType, Src,
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DAG.getConstant(SrcOff, PointerType)),
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SrcPtrInfo.getWithOffset(SrcOff), isVolatile,
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false, false, 0);
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TFOps[i] = Loads[i].getValue(1);
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SrcOff += VTSize;
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}
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
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for (i = 0;
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i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
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TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
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DAG.getNode(ISD::ADD, dl, PointerType, Dst,
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DAG.getConstant(DstOff, PointerType)),
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DstPtrInfo.getWithOffset(DstOff),
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isVolatile, false, 0);
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DstOff += VTSize;
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}
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
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EmittedNumMemOps += i;
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}
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if (BytesLeft == 0)
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return Chain;
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// Issue loads / stores for the trailing (1 - 3) bytes.
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unsigned BytesLeftSave = BytesLeft;
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i = 0;
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while (BytesLeft) {
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if (BytesLeft >= 2) {
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VT = MVT::i16;
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VTSize = 2;
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} else {
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VT = MVT::i8;
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VTSize = 1;
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}
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Loads[i] = DAG.getLoad(VT, dl, Chain,
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DAG.getNode(ISD::ADD, dl, PointerType, Src,
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DAG.getConstant(SrcOff, PointerType)),
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SrcPtrInfo.getWithOffset(SrcOff), false, false,
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false, 0);
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TFOps[i] = Loads[i].getValue(1);
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++i;
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SrcOff += VTSize;
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BytesLeft -= VTSize;
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}
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
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i = 0;
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BytesLeft = BytesLeftSave;
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while (BytesLeft) {
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if (BytesLeft >= 2) {
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VT = MVT::i16;
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VTSize = 2;
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} else {
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VT = MVT::i8;
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VTSize = 1;
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}
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TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
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DAG.getNode(ISD::ADD, dl, PointerType, Dst,
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DAG.getConstant(DstOff, PointerType)),
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DstPtrInfo.getWithOffset(DstOff), false, false, 0);
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++i;
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DstOff += VTSize;
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BytesLeft -= VTSize;
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}
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return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
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}
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SDValue PTXSelectionDAGInfo::
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EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
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SDValue Chain, SDValue Dst,
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SDValue Src, SDValue Size,
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unsigned Align, bool isVolatile,
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MachinePointerInfo DstPtrInfo) const {
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llvm_unreachable("memset lowering not implemented for PTX yet");
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}
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