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3822ff5c71
llvm-6502/lib/CodeGen/SelectionDAG
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Reid Spencer 3822ff5c71 For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 06:47:33 +00:00
..
DAGCombiner.cpp Fix a obscure post-indexed load / store dag combine bug. 2006-11-08 02:38:55 +00:00
LegalizeDAG.cpp Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll. 2006-11-07 04:11:44 +00:00
Makefile
ScheduleDAG.cpp Changes to use operand constraints to process two-address instructions. 2006-11-04 09:44:31 +00:00
ScheduleDAGList.cpp Changes to use operand constraints to process two-address instructions. 2006-11-04 09:44:31 +00:00
ScheduleDAGRRList.cpp Remove dead code; added a missing null ptr check. 2006-11-06 21:33:46 +00:00
ScheduleDAGSimple.cpp For PR786: 2006-11-02 20:25:50 +00:00
SelectionDAG.cpp Unbreak VC++ build. 2006-11-05 19:31:28 +00:00
SelectionDAGISel.cpp For PR950: 2006-11-08 06:47:33 +00:00
SelectionDAGPrinter.cpp Print jumptable index. 2006-11-01 04:48:30 +00:00
TargetLowering.cpp For PR786: 2006-11-02 20:25:50 +00:00