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a787066317
This is currently considered experimental, but most of the more commonly used instructions should work. So far only SI has been extensively tested, CI and VI probably work too, but may be buggy. The current set of tests cases do not give complete coverage, but I think it is sufficient for an experimental assembler. See the documentation in R600Usage for more information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234381 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
971 B
ArmAsm
38 lines
971 B
ArmAsm
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=SI %s 2>&1 | FileCheck %s
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s_mov_b32 v1, s2
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// CHECK: error: invalid operand for instruction
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s_mov_b32 s1, v0
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// CHECK: error: invalid operand for instruction
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s_mov_b32 s[1:2], s0
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// CHECK: error: invalid operand for instruction
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s_mov_b32 s0, s[1:2]
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// CHECK: error: invalid operand for instruction
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s_mov_b32 s220, s0
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// CHECK: error: invalid operand for instruction
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s_mov_b32 s0, s220
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// CHECK: error: invalid operand for instruction
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s_mov_b64 s1, s[0:1]
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// CHECK: error: invalid operand for instruction
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s_mov_b64 s[0:1], s1
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// CHECK: error: invalid operand for instruction
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// Immediate greater than 32-bits
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s_mov_b32 s1, 0xfffffffff
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// CHECK: error: invalid immediate: only 32-bit values are legal
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// Immediate greater than 32-bits
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s_mov_b64 s[0:1], 0xfffffffff
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// CHECK: error: invalid immediate: only 32-bit values are legal
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// Out of range register
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s_mov_b32 s
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