llvm-6502/test/CodeGen
Evan Cheng 8d1092be64 Add nounwind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101613 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 03:43:36 +00:00
..
Alpha
ARM Fix PR6847. RegScavenger should ignore DebugValues. 2010-04-15 20:28:39 +00:00
Blackfin
CBackend
CellSPU Make sure this test tests something. 2010-04-09 19:03:31 +00:00
CPP
Generic
MBlaze
Mips
MSP430
PIC16
PowerPC
SPARC
SystemZ
Thumb
Thumb2 Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle is doing the right thing and codegen looks correct for both Thumb and Thumb2. 2010-04-15 22:20:34 +00:00
X86 Add nounwind. 2010-04-17 03:43:36 +00:00
XCore