mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-29 10:32:47 +00:00
8b2b8a1835
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
1.2 KiB
LLVM
48 lines
1.2 KiB
LLVM
; Test that we take advantage of signext and zeroext annotations.
|
|
;
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
|
|
|
|
; Zero extension of something that is already zero-extended.
|
|
define void @f1(i32 zeroext %r2, i64 *%r3) {
|
|
; CHECK-LABEL: f1:
|
|
; CHECK-NOT: %r2
|
|
; CHECK: stg %r2, 0(%r3)
|
|
; CHECK: br %r14
|
|
%conv = zext i32 %r2 to i64
|
|
store i64 %conv, i64* %r3
|
|
ret void
|
|
}
|
|
|
|
; Sign extension of something that is already sign-extended.
|
|
define void @f2(i32 signext %r2, i64 *%r3) {
|
|
; CHECK-LABEL: f2:
|
|
; CHECK-NOT: %r2
|
|
; CHECK: stg %r2, 0(%r3)
|
|
; CHECK: br %r14
|
|
%conv = sext i32 %r2 to i64
|
|
store i64 %conv, i64* %r3
|
|
ret void
|
|
}
|
|
|
|
; Sign extension of something that is already zero-extended.
|
|
define void @f3(i32 zeroext %r2, i64 *%r3) {
|
|
; CHECK-LABEL: f3:
|
|
; CHECK: lgfr [[REGISTER:%r[0-5]+]], %r2
|
|
; CHECK: stg [[REGISTER]], 0(%r3)
|
|
; CHECK: br %r14
|
|
%conv = sext i32 %r2 to i64
|
|
store i64 %conv, i64* %r3
|
|
ret void
|
|
}
|
|
|
|
; Zero extension of something that is already sign-extended.
|
|
define void @f4(i32 signext %r2, i64 *%r3) {
|
|
; CHECK-LABEL: f4:
|
|
; CHECK: llgfr [[REGISTER:%r[0-5]+]], %r2
|
|
; CHECK: stg [[REGISTER]], 0(%r3)
|
|
; CHECK: br %r14
|
|
%conv = zext i32 %r2 to i64
|
|
store i64 %conv, i64* %r3
|
|
ret void
|
|
}
|