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7271ac2c03
SystemZ wants normal register scavenging slots, as close to the stack or frame pointer as possible. The only reason it was using custom code was because PrologEpilogInserter assumed an x86-like layout, where the frame pointer is at the opposite end of the frame from the stack pointer. This meant that when frame pointer elimination was disabled, the slots ended up being as close as possible to the incoming stack pointer, which is the opposite of what we want on SystemZ. This patch adds a new knob to say which layout is used and converts SystemZ to use target-independent scavenging slots. It's one of the pieces needed to support frame-to-frame MVCs, where two slots might be required. The ABI requires us to allocate 160 bytes for calls, so one approach would be to use that area as temporary spill space instead. It would need some surgery to make sure that the slot isn't live across a call though. I stuck to the "isFPCloseToIncomingSP - ..." style comment on the "do what the surrounding code does" principle. The FP case is already covered by several Systemz/frame-* tests, which fail without the PrologueEpilogueInserter change, so no new ones are needed. No behavioural change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185696 91177308-0d34-0410-b5e6-96231b3b80d8
65 lines
1.9 KiB
C++
65 lines
1.9 KiB
C++
//===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SystemZREGISTERINFO_H
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#define SystemZREGISTERINFO_H
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#include "SystemZ.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#define GET_REGINFO_HEADER
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#include "SystemZGenRegisterInfo.inc"
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namespace llvm {
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namespace SystemZ {
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// Return the subreg to use for referring to the even and odd registers
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// in a GR128 pair. Is32Bit says whether we want a GR32 or GR64.
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inline unsigned even128(bool Is32bit) {
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return Is32bit ? subreg_32bit : subreg_high;
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}
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inline unsigned odd128(bool Is32bit) {
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return Is32bit ? subreg_low32 : subreg_low;
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}
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}
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class SystemZSubtarget;
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class SystemZInstrInfo;
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struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
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private:
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SystemZTargetMachine &TM;
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public:
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SystemZRegisterInfo(SystemZTargetMachine &tm);
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// Override TargetRegisterInfo.h.
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virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
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LLVM_OVERRIDE {
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return true;
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}
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virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const
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LLVM_OVERRIDE {
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return true;
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}
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virtual const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0)
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const LLVM_OVERRIDE;
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virtual BitVector getReservedRegs(const MachineFunction &MF)
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const LLVM_OVERRIDE;
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virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS) const LLVM_OVERRIDE;
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virtual unsigned getFrameRegister(const MachineFunction &MF) const
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LLVM_OVERRIDE;
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};
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} // end namespace llvm
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#endif
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