Tim Northover 8b6257629a AArch64: remove "arm64_be" support in favour of "aarch64_be". ... There really is no arm64_be: it was a useful fiction to test big-endian support while both backends existed in parallel, but now the only platform that uses the name (iOS) doesn't have a big-endian variant, let alone one called "arm64_be". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213748 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-23 12:58:11 +00:00
..
AsmParser	AArch64: remove "arm64_be" support in favour of "aarch64_be".	2014-07-23 12:58:11 +00:00
Disassembler	AArch64: remove "arm64_be" support in favour of "aarch64_be".	2014-07-23 12:58:11 +00:00
InstPrinter
MCTargetDesc	AArch64: remove "arm64_be" support in favour of "aarch64_be".	2014-07-23 12:58:11 +00:00
TargetInfo	AArch64: remove "arm64_be" support in favour of "aarch64_be".	2014-07-23 12:58:11 +00:00
Utils
AArch64.h
AArch64.td
AArch64AddressTypePromotion.cpp	AArch64: Re-enable AArch64AddressTypePromotion	2014-07-02 18:17:40 +00:00
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp	AArch64: remove "arm64_be" support in favour of "aarch64_be".	2014-07-23 12:58:11 +00:00
AArch64BranchRelaxation.cpp
AArch64CallingConvention.td	ARM: Allow __fp16 as a function arg or return type for AArch64	2014-07-11 13:33:46 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64ConditionalCompares.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp	AArch64: remove unnecessary pseudo-instruction.	2014-07-14 11:16:02 +00:00
AArch64FastISel.cpp	[FastIsel][AArch64] Add support for the FastLowerCall and FastLowerIntrinsicCall target-hooks.	2014-07-22 23:14:58 +00:00
AArch64FrameLowering.cpp
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td	Port memory barriers intrinsics to AArch64	2014-07-17 10:50:20 +00:00
AArch64InstrInfo.cpp
AArch64InstrInfo.h
AArch64InstrInfo.td	CodeGen: emit IR-level f16 conversion intrinsics as fptrunc/fpext	2014-07-21 09:13:56 +00:00
AArch64ISelDAGToDAG.cpp	[AArch64] Unsized types don't specify an alignment.	2014-06-30 15:03:00 +00:00
AArch64ISelLowering.cpp	AArch64: implement efficient f16 bitcasts	2014-07-18 13:07:05 +00:00
AArch64ISelLowering.h	[codegen,aarch64] Add a target hook to the code generator to control	2014-07-03 00:23:43 +00:00
AArch64LoadStoreOptimizer.cpp
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp	[DAG] Pass the argument list to the CallLoweringInfo via move semantics. NFCI.	2014-07-01 22:01:54 +00:00
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp
AArch64Subtarget.h
AArch64TargetMachine.cpp	AArch64: remove "arm64_be" support in favour of "aarch64_be".	2014-07-23 12:58:11 +00:00
AArch64TargetMachine.h	Remove extraneous includes from the target machines.	2014-06-26 19:30:05 +00:00
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp
CMakeLists.txt
LLVMBuild.txt
Makefile