mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
111 lines
3.2 KiB
LLVM
111 lines
3.2 KiB
LLVM
; RUN: llc -mcpu=ppc64 < %s | FileCheck %s -check-prefix=GENERIC
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; RUN: llc -mcpu=970 < %s | FileCheck %s -check-prefix=PWR
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; RUN: llc -mcpu=a2 < %s | FileCheck %s -check-prefix=BASIC
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; RUN: llc -mcpu=e500mc < %s | FileCheck %s -check-prefix=BASIC
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; RUN: llc -mcpu=e5500 < %s | FileCheck %s -check-prefix=BASIC
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; RUN: llc -mcpu=pwr4 < %s | FileCheck %s -check-prefix=PWR
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; RUN: llc -mcpu=pwr5 < %s | FileCheck %s -check-prefix=PWR
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; RUN: llc -mcpu=pwr5x < %s | FileCheck %s -check-prefix=PWR
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; RUN: llc -mcpu=pwr6 < %s | FileCheck %s -check-prefix=PWR
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; RUN: llc -mcpu=pwr6x < %s | FileCheck %s -check-prefix=PWR
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; RUN: llc -mcpu=pwr7 < %s | FileCheck %s -check-prefix=PWR
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; RUN: llc -mcpu=pwr8 < %s | FileCheck %s -check-prefix=PWR
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define signext i32 @foo(i32 signext %x) #0 {
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entry:
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%mul = shl nsw i32 %x, 1
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ret i32 %mul
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; GENERIC-LABEL: .globl foo
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; BASIC-LABEL: .globl foo
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; PWR-LABEL: .globl foo
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; GENERIC: .align 2
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; BASIC: .align 4
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; PWR: .align 4
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; GENERIC: @foo
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; BASIC: @foo
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; PWR: @foo
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}
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; Function Attrs: nounwind
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define void @loop(i32 signext %x, i32* nocapture %a) #1 {
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entry:
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br label %vector.body
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; GENERIC-LABEL: @loop
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; BASIC-LABEL: @loop
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; PWR-LABEL: @loop
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; GENERIC: mtctr
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; BASIC: mtctr
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; PWR: mtctr
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; GENERIC-NOT: .align
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; BASIC: .align 4
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; PWR: .align 4
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; GENERIC: lwzu
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; BASIC: lwzu
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; PWR: lwzu
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; GENERIC: bdnz
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; BASIC: bdnz
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; PWR: bdnz
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vector.body: ; preds = %vector.body, %entry
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%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
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%induction45 = or i64 %index, 1
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%0 = getelementptr inbounds i32, i32* %a, i64 %index
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%1 = getelementptr inbounds i32, i32* %a, i64 %induction45
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%2 = load i32, i32* %0, align 4
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%3 = load i32, i32* %1, align 4
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%4 = add nsw i32 %2, 4
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%5 = add nsw i32 %3, 4
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%6 = mul nsw i32 %4, 3
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%7 = mul nsw i32 %5, 3
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store i32 %6, i32* %0, align 4
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store i32 %7, i32* %1, align 4
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%index.next = add i64 %index, 2
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%8 = icmp eq i64 %index.next, 2048
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br i1 %8, label %for.end, label %vector.body
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for.end: ; preds = %vector.body
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ret void
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}
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; Function Attrs: nounwind
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define void @sloop(i32 signext %x, i32* nocapture %a) #1 {
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entry:
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br label %for.body
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; GENERIC-LABEL: @sloop
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; BASIC-LABEL: @sloop
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; PWR-LABEL: @sloop
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; GENERIC: mtctr
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; BASIC: mtctr
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; PWR: mtctr
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; GENERIC-NOT: .align
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; BASIC: .align 4
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; PWR: .align 5
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; GENERIC: bdnz
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; BASIC: bdnz
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; PWR: bdnz
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, 4
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%mul = mul nsw i32 %add, 3
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store i32 %mul, i32* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 2048
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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