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llvm-6502/test/MC/Disassembler
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Jozef Kolek c589d1b3bc [mips][microMIPSr6] Implement CACHE and PREF instructions 
Implement CACHE and PREF instructions using mapping.

Differential Revision: http://reviews.llvm.org/D8893


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-21 11:17:25 +00:00
..
AArch64 [AArch64] LORID_EL1 register must be treated as read-only 2015-04-20 16:54:37 +00:00
ARM [ARM] Add v8.1a "Privileged Access Never" extension 2015-04-16 11:34:25 +00:00
Hexagon
Mips [mips][microMIPSr6] Implement CACHE and PREF instructions 2015-04-21 11:17:25 +00:00
PowerPC Add direct moves to/from VSR and exploit them for FP/INT conversions 2015-04-11 10:40:42 +00:00
Sparc
SystemZ
X86
XCore