llvm-6502/test/MC
Hao Liu 6a5a667517 Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:00:52 +00:00
..
AArch64 Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
ARM [ARM] Improve build attributes emission. 2013-10-07 16:55:23 +00:00
AsmParser MCParser/Debug info: Accept line number 0 as a legitimate value, since 2013-09-26 23:37:11 +00:00
COFF COFF: Ensure that objects produced by LLVM link with /safeseh 2013-09-17 23:18:05 +00:00
Disassembler [AArch64] Add support for NEON scalar floating-point reciprocal estimate, 2013-10-08 22:09:04 +00:00
ELF Implements parsing and emitting of .cfi_window_save in MC. 2013-09-26 14:49:40 +00:00
MachO Add test I forgot to git add in r191824. 2013-10-02 14:49:41 +00:00
Markup MC: Simple example parser for MC assembly markup. 2012-10-31 23:24:13 +00:00
Mips Remove some really nasty uses of hasRawTextSupport. 2013-10-05 16:42:21 +00:00
PowerPC PPC: Allow partial fills in writeNopData() 2013-09-26 09:18:48 +00:00
SystemZ [SystemZ] Add comparisons of high words and memory 2013-10-01 15:00:44 +00:00
X86 Allow non-AVX form of pmovmskb to take a GR64 operand. 2013-10-10 05:33:31 +00:00