Jakob Stoklund Olesen 89bea17af2 Avoid rewriting instructions twice. ... This could cause miscompilations in targets where sub-register composition is not always idempotent (ARM). <rdar://problem/12758887> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168837 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-29 00:26:11 +00:00
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ARM	Avoid rewriting instructions twice.	2012-11-29 00:26:11 +00:00
CPP
Generic
Hexagon
MBlaze
Mips	[mips] Generate big GOT code.	2012-11-21 20:40:38 +00:00
MSP430	Add support for varargs functions for msp430.	2012-11-21 17:28:27 +00:00
NVPTX
PowerPC	This patch makes medium code model the default for 64-bit PowerPC ELF.	2012-11-27 23:36:26 +00:00
SPARC
Thumb
Thumb2
X86	When combining consecutive stores allow loads in between the stores, if the loads do not alias.	2012-11-29 00:00:08 +00:00
XCore	Fix handling of aliases to functions.	2012-11-16 21:12:38 +00:00