llvm-6502/test/CodeGen/XCore/unaligned_store.ll
Richard Osborne ccb7e96ef0 Expand unaligned 32 bit loads from an address which is a constant
offset from a 32 bit aligned base as follows:

  ldw low, base[offset >> 2]
  ldw high, base[(offset >> 2) + 1]
  shr low_shifted, low, (offset & 0x3) * 8
  shl high_shifted, high, 32 - (offset & 0x3) * 8
  or result, low_shifted, high_shifted

Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75902 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 10:42:35 +00:00

19 lines
489 B
LLVM

; RUN: llvm-as < %s | llc -march=xcore > %t1.s
; RUN: grep "bl __misaligned_store" %t1.s | count 1
; RUN: grep st16 %t1.s | count 2
; RUN: grep shr %t1.s | count 1
; Byte aligned store. Expands to call to __misaligned_store.
define void @align1(i32* %p, i32 %val) nounwind {
entry:
store i32 %val, i32* %p, align 1
ret void
}
; Half word aligned store. Expands to two 16bit stores.
define void @align2(i32* %p, i32 %val) nounwind {
entry:
store i32 %val, i32* %p, align 2
ret void
}