Chris Lattner 3a508c94a6 the result of an inline asm copy can be an arbitrary VT that the register ... class supports. In the case of vectors, this means we often get the wrong type (e.g. we get v4f32 instead of v8i16). Make sure to convert the vector result to the right type. This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35944 91177308-0d34-0410-b5e6-96231b3b80d8		2007-04-12 06:00:20 +00:00
..
CallingConvLower.cpp	add methods for analysis of call results and return nodes.	2007-02-28 07:09:40 +00:00
DAGCombiner.cpp	fix an infinite loop compiling ldecod, notice by JeffC.	2007-04-11 16:51:53 +00:00
LegalizeDAG.cpp	1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL.	2007-04-02 21:36:32 +00:00
Makefile	For PR780:	2006-07-26 16:18:00 +00:00
ScheduleDAG.cpp	Fix some VC++ warnings.	2007-03-20 20:43:18 +00:00
ScheduleDAGList.cpp	switch the sched unit map over to use a DenseMap instead of std::map. This	2007-02-03 01:34:13 +00:00
ScheduleDAGRRList.cpp	Estimate a cost using the possible number of scratch registers required and use	2007-03-14 22:43:40 +00:00
ScheduleDAGSimple.cpp	switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This	2007-02-04 08:47:20 +00:00
SelectionDAG.cpp	fold noop vbitconvert instructions	2007-04-12 05:58:43 +00:00
SelectionDAGISel.cpp	the result of an inline asm copy can be an arbitrary VT that the register	2007-04-12 06:00:20 +00:00
SelectionDAGPrinter.cpp	Removing even more <iostream> includes.	2006-12-07 20:04:42 +00:00
TargetLowering.cpp	Fix weirdness handling single element vectors.	2007-04-12 04:44:28 +00:00